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add tie folder
This commit is contained in:
Espressif Systems
24
extra_include/xtensa/tie/xt_MUL32.h
Normal file
24
extra_include/xtensa/tie/xt_MUL32.h
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@ -0,0 +1,24 @@
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/* Definitions for the 32-bit Integer Multiply Option. */
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/*
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* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2009 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
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*/
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/* NOTE: This file exists only for backward compatibility with RB-200X.x
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and earlier Xtensa releases. Starting with RC-2009.0 you should use
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<xtensa/tie/xt_mul.h>. */
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#ifndef _XTENSA_xt_MUL32_HEADER
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#define _XTENSA_xt_MUL32_HEADER
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#ifdef __XTENSA__
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#include <xtensa/tie/xt_mul.h>
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#endif /* __XTENSA__ */
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#endif /* !_XTENSA_xt_MUL32_HEADER */
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254
extra_include/xtensa/tie/xt_core.h
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254
extra_include/xtensa/tie/xt_core.h
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/* Definitions for the xt_core TIE package */
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/*
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* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
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||||
*/
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/* Do not modify. This is automatically generated.*/
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#ifndef _XTENSA_xt_core_HEADER
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#define _XTENSA_xt_core_HEADER
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#ifdef __XTENSA__
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#ifdef __XCC__
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/*
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* The following prototypes describe intrinsic functions
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* corresponding to TIE instructions. Some TIE instructions
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* may produce multiple results (designated as "out" operands
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* in the iclass section) or may have operands used as both
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* inputs and outputs (designated as "inout"). However, the C
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* and C++ languages do not provide syntax that can express
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* the in/out/inout constraints of TIE intrinsics.
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* Nevertheless, the compiler understands these constraints
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* and will check that the intrinsic functions are used
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* correctly. To improve the readability of these prototypes,
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* the "out" and "inout" parameters are marked accordingly
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* with comments.
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*/
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extern void _TIE_xt_core_ILL(void);
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extern void _TIE_xt_core_NOP(void);
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extern void _TIE_xt_core_MEMW(void);
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extern void _TIE_xt_core_EXTW(void);
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extern void _TIE_xt_core_ISYNC(void);
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extern void _TIE_xt_core_DSYNC(void);
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extern void _TIE_xt_core_ESYNC(void);
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extern void _TIE_xt_core_RSYNC(void);
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extern unsigned _TIE_xt_core_RSR_176(void);
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extern void _TIE_xt_core_WSR_176(unsigned art);
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extern unsigned _TIE_xt_core_RSR_208(void);
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extern unsigned _TIE_xt_core_uint32_loadi(const unsigned * p, immediate o);
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extern void _TIE_xt_core_uint32_storei(unsigned c, unsigned * p, immediate o);
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extern unsigned _TIE_xt_core_uint32_move(unsigned b);
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extern int _TIE_xt_core_ADDI(int s, immediate i);
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extern int _TIE_xt_core_OR(int s, int t);
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extern int _TIE_xt_core_L32I(const int * p, immediate i);
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extern void _TIE_xt_core_S32I(int r, int * p, immediate i);
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extern unsigned char _TIE_xt_core_L8UI(const unsigned char * p, immediate i);
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extern void _TIE_xt_core_S8I(signed char r, signed char * p, immediate i);
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extern unsigned short _TIE_xt_core_L16UI(const unsigned short * p, immediate i);
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extern short _TIE_xt_core_L16SI(const short * p, immediate i);
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extern void _TIE_xt_core_S16I(short r, short * p, immediate i);
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extern int _TIE_xt_core_ADDMI(int s, immediate i);
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extern int _TIE_xt_core_ADD(int s, int t);
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extern int _TIE_xt_core_ADDX2(int s, int t);
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extern int _TIE_xt_core_ADDX4(int s, int t);
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extern int _TIE_xt_core_ADDX8(int s, int t);
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extern int _TIE_xt_core_SUB(int s, int t);
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extern int _TIE_xt_core_SUBX2(int s, int t);
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extern int _TIE_xt_core_SUBX4(int s, int t);
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extern int _TIE_xt_core_SUBX8(int s, int t);
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extern int _TIE_xt_core_AND(int s, int t);
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extern int _TIE_xt_core_XOR(int s, int t);
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extern unsigned _TIE_xt_core_EXTUI(unsigned t, immediate i, immediate o);
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extern int _TIE_xt_core_MOVI(immediate i);
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extern void _TIE_xt_core_MOVEQZ(int r /*inout*/, int s, int t);
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extern void _TIE_xt_core_MOVNEZ(int r /*inout*/, int s, int t);
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extern void _TIE_xt_core_MOVLTZ(int r /*inout*/, int s, int t);
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extern void _TIE_xt_core_MOVGEZ(int r /*inout*/, int s, int t);
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extern int _TIE_xt_core_NEG(int t);
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extern int _TIE_xt_core_ABS(int t);
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extern void _TIE_xt_core_SSR(int s);
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extern void _TIE_xt_core_SSL(int s);
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extern void _TIE_xt_core_SSA8L(int s);
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extern void _TIE_xt_core_SSA8B(int s);
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extern void _TIE_xt_core_SSAI(immediate i);
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extern int _TIE_xt_core_SLL(int s);
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extern int _TIE_xt_core_SRC(int s, int t);
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extern unsigned _TIE_xt_core_SRL(unsigned t);
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extern int _TIE_xt_core_SRA(int t);
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extern int _TIE_xt_core_SLLI(int s, immediate i);
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extern int _TIE_xt_core_SRAI(int t, immediate i);
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extern unsigned _TIE_xt_core_SRLI(unsigned t, immediate i);
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extern int _TIE_xt_core_SSAI_SRC(int src1, int src2, immediate amount);
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extern int _TIE_xt_core_SSR_SRC(int src1, int src2, int amount);
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extern int _TIE_xt_core_WSR_SAR_SRC(int src1, int src2, int amount);
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extern int _TIE_xt_core_SSR_SRA(int src, int amount);
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extern unsigned _TIE_xt_core_SSR_SRL(unsigned src, int amount);
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extern int _TIE_xt_core_SSL_SLL(int src, int amount);
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extern int _TIE_xt_core_RSIL(immediate t);
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extern unsigned _TIE_xt_core_RSR_SAR(void);
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extern void _TIE_xt_core_WSR_SAR(unsigned t);
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extern void _TIE_xt_core_XSR_SAR(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_LITBASE(void);
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extern void _TIE_xt_core_WSR_LITBASE(unsigned t);
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extern void _TIE_xt_core_XSR_LITBASE(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_PS(void);
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extern void _TIE_xt_core_WSR_PS(unsigned t);
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extern void _TIE_xt_core_XSR_PS(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPC1(void);
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extern void _TIE_xt_core_WSR_EPC1(unsigned t);
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extern void _TIE_xt_core_XSR_EPC1(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCSAVE1(void);
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extern void _TIE_xt_core_WSR_EXCSAVE1(unsigned t);
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extern void _TIE_xt_core_XSR_EXCSAVE1(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPC2(void);
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extern void _TIE_xt_core_WSR_EPC2(unsigned t);
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extern void _TIE_xt_core_XSR_EPC2(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCSAVE2(void);
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extern void _TIE_xt_core_WSR_EXCSAVE2(unsigned t);
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extern void _TIE_xt_core_XSR_EXCSAVE2(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPC3(void);
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extern void _TIE_xt_core_WSR_EPC3(unsigned t);
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extern void _TIE_xt_core_XSR_EPC3(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCSAVE3(void);
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extern void _TIE_xt_core_WSR_EXCSAVE3(unsigned t);
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extern void _TIE_xt_core_XSR_EXCSAVE3(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_VECBASE(void);
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extern void _TIE_xt_core_WSR_VECBASE(unsigned t);
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extern void _TIE_xt_core_XSR_VECBASE(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPS2(void);
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extern void _TIE_xt_core_WSR_EPS2(unsigned t);
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extern void _TIE_xt_core_XSR_EPS2(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EPS3(void);
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extern void _TIE_xt_core_WSR_EPS3(unsigned t);
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extern void _TIE_xt_core_XSR_EPS3(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCCAUSE(void);
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extern void _TIE_xt_core_WSR_EXCCAUSE(unsigned t);
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extern void _TIE_xt_core_XSR_EXCCAUSE(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_EXCVADDR(void);
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extern void _TIE_xt_core_WSR_EXCVADDR(unsigned t);
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extern void _TIE_xt_core_XSR_EXCVADDR(unsigned t /*inout*/);
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extern unsigned _TIE_xt_core_RSR_DEPC(void);
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extern void _TIE_xt_core_WSR_DEPC(unsigned t);
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extern void _TIE_xt_core_XSR_DEPC(unsigned t /*inout*/);
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extern int _TIE_xt_core_RSR_PRID(void);
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#define XT_ILL _TIE_xt_core_ILL
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#define XT_NOP _TIE_xt_core_NOP
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#define XT_MEMW _TIE_xt_core_MEMW
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#define XT_EXTW _TIE_xt_core_EXTW
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#define XT_ISYNC _TIE_xt_core_ISYNC
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#define XT_DSYNC _TIE_xt_core_DSYNC
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#define XT_ESYNC _TIE_xt_core_ESYNC
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#define XT_RSYNC _TIE_xt_core_RSYNC
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#define XT_RSR_176 _TIE_xt_core_RSR_176
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#define XT_WSR_176 _TIE_xt_core_WSR_176
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#define XT_RSR_208 _TIE_xt_core_RSR_208
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#define XT_uint32_loadi _TIE_xt_core_uint32_loadi
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#define XT_uint32_storei _TIE_xt_core_uint32_storei
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#define XT_uint32_move _TIE_xt_core_uint32_move
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#define XT_ADDI _TIE_xt_core_ADDI
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#define XT_OR _TIE_xt_core_OR
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#define XT_L32I _TIE_xt_core_L32I
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#define XT_S32I _TIE_xt_core_S32I
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#define XT_L8UI _TIE_xt_core_L8UI
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#define XT_S8I _TIE_xt_core_S8I
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#define XT_L16UI _TIE_xt_core_L16UI
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#define XT_L16SI _TIE_xt_core_L16SI
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#define XT_S16I _TIE_xt_core_S16I
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#define XT_ADDMI _TIE_xt_core_ADDMI
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#define XT_ADD _TIE_xt_core_ADD
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#define XT_ADDX2 _TIE_xt_core_ADDX2
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#define XT_ADDX4 _TIE_xt_core_ADDX4
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#define XT_ADDX8 _TIE_xt_core_ADDX8
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#define XT_SUB _TIE_xt_core_SUB
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#define XT_SUBX2 _TIE_xt_core_SUBX2
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#define XT_SUBX4 _TIE_xt_core_SUBX4
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#define XT_SUBX8 _TIE_xt_core_SUBX8
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#define XT_AND _TIE_xt_core_AND
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#define XT_XOR _TIE_xt_core_XOR
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#define XT_EXTUI _TIE_xt_core_EXTUI
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#define XT_MOVI _TIE_xt_core_MOVI
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#define XT_MOVEQZ _TIE_xt_core_MOVEQZ
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#define XT_MOVNEZ _TIE_xt_core_MOVNEZ
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#define XT_MOVLTZ _TIE_xt_core_MOVLTZ
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#define XT_MOVGEZ _TIE_xt_core_MOVGEZ
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#define XT_NEG _TIE_xt_core_NEG
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#define XT_ABS _TIE_xt_core_ABS
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#define XT_SSR _TIE_xt_core_SSR
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#define XT_SSL _TIE_xt_core_SSL
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#define XT_SSA8L _TIE_xt_core_SSA8L
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#define XT_SSA8B _TIE_xt_core_SSA8B
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#define XT_SSAI _TIE_xt_core_SSAI
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#define XT_SLL _TIE_xt_core_SLL
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#define XT_SRC _TIE_xt_core_SRC
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#define XT_SRL _TIE_xt_core_SRL
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#define XT_SRA _TIE_xt_core_SRA
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#define XT_SLLI _TIE_xt_core_SLLI
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#define XT_SRAI _TIE_xt_core_SRAI
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#define XT_SRLI _TIE_xt_core_SRLI
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#define XT_SSAI_SRC _TIE_xt_core_SSAI_SRC
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#define XT_SSR_SRC _TIE_xt_core_SSR_SRC
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#define XT_WSR_SAR_SRC _TIE_xt_core_WSR_SAR_SRC
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#define XT_SSR_SRA _TIE_xt_core_SSR_SRA
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||||
#define XT_SSR_SRL _TIE_xt_core_SSR_SRL
|
||||
#define XT_SSL_SLL _TIE_xt_core_SSL_SLL
|
||||
#define XT_RSIL _TIE_xt_core_RSIL
|
||||
#define XT_RSR_SAR _TIE_xt_core_RSR_SAR
|
||||
#define XT_WSR_SAR _TIE_xt_core_WSR_SAR
|
||||
#define XT_XSR_SAR _TIE_xt_core_XSR_SAR
|
||||
#define XT_RSR_LITBASE _TIE_xt_core_RSR_LITBASE
|
||||
#define XT_WSR_LITBASE _TIE_xt_core_WSR_LITBASE
|
||||
#define XT_XSR_LITBASE _TIE_xt_core_XSR_LITBASE
|
||||
#define XT_RSR_PS _TIE_xt_core_RSR_PS
|
||||
#define XT_WSR_PS _TIE_xt_core_WSR_PS
|
||||
#define XT_XSR_PS _TIE_xt_core_XSR_PS
|
||||
#define XT_RSR_EPC1 _TIE_xt_core_RSR_EPC1
|
||||
#define XT_WSR_EPC1 _TIE_xt_core_WSR_EPC1
|
||||
#define XT_XSR_EPC1 _TIE_xt_core_XSR_EPC1
|
||||
#define XT_RSR_EXCSAVE1 _TIE_xt_core_RSR_EXCSAVE1
|
||||
#define XT_WSR_EXCSAVE1 _TIE_xt_core_WSR_EXCSAVE1
|
||||
#define XT_XSR_EXCSAVE1 _TIE_xt_core_XSR_EXCSAVE1
|
||||
#define XT_RSR_EPC2 _TIE_xt_core_RSR_EPC2
|
||||
#define XT_WSR_EPC2 _TIE_xt_core_WSR_EPC2
|
||||
#define XT_XSR_EPC2 _TIE_xt_core_XSR_EPC2
|
||||
#define XT_RSR_EXCSAVE2 _TIE_xt_core_RSR_EXCSAVE2
|
||||
#define XT_WSR_EXCSAVE2 _TIE_xt_core_WSR_EXCSAVE2
|
||||
#define XT_XSR_EXCSAVE2 _TIE_xt_core_XSR_EXCSAVE2
|
||||
#define XT_RSR_EPC3 _TIE_xt_core_RSR_EPC3
|
||||
#define XT_WSR_EPC3 _TIE_xt_core_WSR_EPC3
|
||||
#define XT_XSR_EPC3 _TIE_xt_core_XSR_EPC3
|
||||
#define XT_RSR_EXCSAVE3 _TIE_xt_core_RSR_EXCSAVE3
|
||||
#define XT_WSR_EXCSAVE3 _TIE_xt_core_WSR_EXCSAVE3
|
||||
#define XT_XSR_EXCSAVE3 _TIE_xt_core_XSR_EXCSAVE3
|
||||
#define XT_RSR_VECBASE _TIE_xt_core_RSR_VECBASE
|
||||
#define XT_WSR_VECBASE _TIE_xt_core_WSR_VECBASE
|
||||
#define XT_XSR_VECBASE _TIE_xt_core_XSR_VECBASE
|
||||
#define XT_RSR_EPS2 _TIE_xt_core_RSR_EPS2
|
||||
#define XT_WSR_EPS2 _TIE_xt_core_WSR_EPS2
|
||||
#define XT_XSR_EPS2 _TIE_xt_core_XSR_EPS2
|
||||
#define XT_RSR_EPS3 _TIE_xt_core_RSR_EPS3
|
||||
#define XT_WSR_EPS3 _TIE_xt_core_WSR_EPS3
|
||||
#define XT_XSR_EPS3 _TIE_xt_core_XSR_EPS3
|
||||
#define XT_RSR_EXCCAUSE _TIE_xt_core_RSR_EXCCAUSE
|
||||
#define XT_WSR_EXCCAUSE _TIE_xt_core_WSR_EXCCAUSE
|
||||
#define XT_XSR_EXCCAUSE _TIE_xt_core_XSR_EXCCAUSE
|
||||
#define XT_RSR_EXCVADDR _TIE_xt_core_RSR_EXCVADDR
|
||||
#define XT_WSR_EXCVADDR _TIE_xt_core_WSR_EXCVADDR
|
||||
#define XT_XSR_EXCVADDR _TIE_xt_core_XSR_EXCVADDR
|
||||
#define XT_RSR_DEPC _TIE_xt_core_RSR_DEPC
|
||||
#define XT_WSR_DEPC _TIE_xt_core_WSR_DEPC
|
||||
#define XT_XSR_DEPC _TIE_xt_core_XSR_DEPC
|
||||
#define XT_RSR_PRID _TIE_xt_core_RSR_PRID
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_core_HEADER */
|
||||
93
extra_include/xtensa/tie/xt_debug.h
Normal file
93
extra_include/xtensa/tie/xt_debug.h
Normal file
@ -0,0 +1,93 @@
|
||||
/* Definitions for the xt_debug TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_debug_HEADER
|
||||
#define _XTENSA_xt_debug_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_debug_BREAK(immediate imms, immediate immt);
|
||||
extern void _TIE_xt_debug_BREAK_N(immediate imms);
|
||||
extern unsigned _TIE_xt_debug_RSR_DBREAKA0(void);
|
||||
extern void _TIE_xt_debug_WSR_DBREAKA0(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_DBREAKA0(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_DBREAKC0(void);
|
||||
extern void _TIE_xt_debug_WSR_DBREAKC0(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_DBREAKC0(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_IBREAKA0(void);
|
||||
extern void _TIE_xt_debug_WSR_IBREAKA0(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_IBREAKA0(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_IBREAKENABLE(void);
|
||||
extern void _TIE_xt_debug_WSR_IBREAKENABLE(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_IBREAKENABLE(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_DEBUGCAUSE(void);
|
||||
extern void _TIE_xt_debug_WSR_DEBUGCAUSE(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_DEBUGCAUSE(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_ICOUNT(void);
|
||||
extern void _TIE_xt_debug_WSR_ICOUNT(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_ICOUNT(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_ICOUNTLEVEL(void);
|
||||
extern void _TIE_xt_debug_WSR_ICOUNTLEVEL(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_ICOUNTLEVEL(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_debug_RSR_DDR(void);
|
||||
extern void _TIE_xt_debug_WSR_DDR(unsigned art);
|
||||
extern void _TIE_xt_debug_XSR_DDR(unsigned art /*inout*/);
|
||||
#define XT_BREAK _TIE_xt_debug_BREAK
|
||||
#define XT_BREAK_N _TIE_xt_debug_BREAK_N
|
||||
#define XT_RSR_DBREAKA0 _TIE_xt_debug_RSR_DBREAKA0
|
||||
#define XT_WSR_DBREAKA0 _TIE_xt_debug_WSR_DBREAKA0
|
||||
#define XT_XSR_DBREAKA0 _TIE_xt_debug_XSR_DBREAKA0
|
||||
#define XT_RSR_DBREAKC0 _TIE_xt_debug_RSR_DBREAKC0
|
||||
#define XT_WSR_DBREAKC0 _TIE_xt_debug_WSR_DBREAKC0
|
||||
#define XT_XSR_DBREAKC0 _TIE_xt_debug_XSR_DBREAKC0
|
||||
#define XT_RSR_IBREAKA0 _TIE_xt_debug_RSR_IBREAKA0
|
||||
#define XT_WSR_IBREAKA0 _TIE_xt_debug_WSR_IBREAKA0
|
||||
#define XT_XSR_IBREAKA0 _TIE_xt_debug_XSR_IBREAKA0
|
||||
#define XT_RSR_IBREAKENABLE _TIE_xt_debug_RSR_IBREAKENABLE
|
||||
#define XT_WSR_IBREAKENABLE _TIE_xt_debug_WSR_IBREAKENABLE
|
||||
#define XT_XSR_IBREAKENABLE _TIE_xt_debug_XSR_IBREAKENABLE
|
||||
#define XT_RSR_DEBUGCAUSE _TIE_xt_debug_RSR_DEBUGCAUSE
|
||||
#define XT_WSR_DEBUGCAUSE _TIE_xt_debug_WSR_DEBUGCAUSE
|
||||
#define XT_XSR_DEBUGCAUSE _TIE_xt_debug_XSR_DEBUGCAUSE
|
||||
#define XT_RSR_ICOUNT _TIE_xt_debug_RSR_ICOUNT
|
||||
#define XT_WSR_ICOUNT _TIE_xt_debug_WSR_ICOUNT
|
||||
#define XT_XSR_ICOUNT _TIE_xt_debug_XSR_ICOUNT
|
||||
#define XT_RSR_ICOUNTLEVEL _TIE_xt_debug_RSR_ICOUNTLEVEL
|
||||
#define XT_WSR_ICOUNTLEVEL _TIE_xt_debug_WSR_ICOUNTLEVEL
|
||||
#define XT_XSR_ICOUNTLEVEL _TIE_xt_debug_XSR_ICOUNTLEVEL
|
||||
#define XT_RSR_DDR _TIE_xt_debug_RSR_DDR
|
||||
#define XT_WSR_DDR _TIE_xt_debug_WSR_DDR
|
||||
#define XT_XSR_DDR _TIE_xt_debug_XSR_DDR
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_debug_HEADER */
|
||||
57
extra_include/xtensa/tie/xt_density.h
Normal file
57
extra_include/xtensa/tie/xt_density.h
Normal file
@ -0,0 +1,57 @@
|
||||
/* Definitions for the xt_density TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_density_HEADER
|
||||
#define _XTENSA_xt_density_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_density_ILL_N(void);
|
||||
extern void _TIE_xt_density_NOP_N(void);
|
||||
extern int _TIE_xt_density_L32I_N(const int * p, immediate i);
|
||||
extern void _TIE_xt_density_S32I_N(int t, int * p, immediate i);
|
||||
extern int _TIE_xt_density_ADD_N(int s, int t);
|
||||
extern int _TIE_xt_density_ADDI_N(int s, immediate i);
|
||||
extern int _TIE_xt_density_MOV_N(int s);
|
||||
extern int _TIE_xt_density_MOVI_N(immediate i);
|
||||
#define XT_ILL_N _TIE_xt_density_ILL_N
|
||||
#define XT_NOP_N _TIE_xt_density_NOP_N
|
||||
#define XT_L32I_N _TIE_xt_density_L32I_N
|
||||
#define XT_S32I_N _TIE_xt_density_S32I_N
|
||||
#define XT_ADD_N _TIE_xt_density_ADD_N
|
||||
#define XT_ADDI_N _TIE_xt_density_ADDI_N
|
||||
#define XT_MOV_N _TIE_xt_density_MOV_N
|
||||
#define XT_MOVI_N _TIE_xt_density_MOVI_N
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_density_HEADER */
|
||||
46
extra_include/xtensa/tie/xt_exceptions.h
Normal file
46
extra_include/xtensa/tie/xt_exceptions.h
Normal file
@ -0,0 +1,46 @@
|
||||
/* Definitions for the xt_exceptions TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_exceptions_HEADER
|
||||
#define _XTENSA_xt_exceptions_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_exceptions_EXCW(void);
|
||||
extern void _TIE_xt_exceptions_SYSCALL(void);
|
||||
extern void _TIE_xt_exceptions_SIMCALL(void);
|
||||
#define XT_EXCW _TIE_xt_exceptions_EXCW
|
||||
#define XT_SYSCALL _TIE_xt_exceptions_SYSCALL
|
||||
#define XT_SIMCALL _TIE_xt_exceptions_SIMCALL
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_exceptions_HEADER */
|
||||
44
extra_include/xtensa/tie/xt_externalregisters.h
Normal file
44
extra_include/xtensa/tie/xt_externalregisters.h
Normal file
@ -0,0 +1,44 @@
|
||||
/* Definitions for the xt_externalregisters TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_externalregisters_HEADER
|
||||
#define _XTENSA_xt_externalregisters_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_externalregisters_RER(void);
|
||||
extern void _TIE_xt_externalregisters_WER(void);
|
||||
#define XT_RER _TIE_xt_externalregisters_RER
|
||||
#define XT_WER _TIE_xt_externalregisters_WER
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_externalregisters_HEADER */
|
||||
55
extra_include/xtensa/tie/xt_interrupt.h
Normal file
55
extra_include/xtensa/tie/xt_interrupt.h
Normal file
@ -0,0 +1,55 @@
|
||||
/* Definitions for the xt_interrupt TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_interrupt_HEADER
|
||||
#define _XTENSA_xt_interrupt_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_interrupt_WAITI(immediate s);
|
||||
extern unsigned _TIE_xt_interrupt_RSR_INTERRUPT(void);
|
||||
extern void _TIE_xt_interrupt_WSR_INTSET(unsigned art);
|
||||
extern void _TIE_xt_interrupt_WSR_INTCLEAR(unsigned art);
|
||||
extern unsigned _TIE_xt_interrupt_RSR_INTENABLE(void);
|
||||
extern void _TIE_xt_interrupt_WSR_INTENABLE(unsigned art);
|
||||
extern void _TIE_xt_interrupt_XSR_INTENABLE(unsigned art /*inout*/);
|
||||
#define XT_WAITI _TIE_xt_interrupt_WAITI
|
||||
#define XT_RSR_INTERRUPT _TIE_xt_interrupt_RSR_INTERRUPT
|
||||
#define XT_WSR_INTSET _TIE_xt_interrupt_WSR_INTSET
|
||||
#define XT_WSR_INTCLEAR _TIE_xt_interrupt_WSR_INTCLEAR
|
||||
#define XT_RSR_INTENABLE _TIE_xt_interrupt_RSR_INTENABLE
|
||||
#define XT_WSR_INTENABLE _TIE_xt_interrupt_WSR_INTENABLE
|
||||
#define XT_XSR_INTENABLE _TIE_xt_interrupt_XSR_INTENABLE
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_interrupt_HEADER */
|
||||
45
extra_include/xtensa/tie/xt_misc.h
Normal file
45
extra_include/xtensa/tie/xt_misc.h
Normal file
@ -0,0 +1,45 @@
|
||||
/* Definitions for the xt_misc TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_misc_HEADER
|
||||
#define _XTENSA_xt_misc_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern int _TIE_xt_misc_NSA(int s);
|
||||
extern unsigned _TIE_xt_misc_NSAU(unsigned s);
|
||||
#define XT_NSA _TIE_xt_misc_NSA
|
||||
#define XT_NSAU _TIE_xt_misc_NSAU
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_misc_HEADER */
|
||||
61
extra_include/xtensa/tie/xt_mmu.h
Normal file
61
extra_include/xtensa/tie/xt_mmu.h
Normal file
@ -0,0 +1,61 @@
|
||||
/* Definitions for the xt_mmu TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_mmu_HEADER
|
||||
#define _XTENSA_xt_mmu_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_mmu_IDTLB(unsigned ars);
|
||||
extern unsigned _TIE_xt_mmu_RDTLB1(unsigned ars);
|
||||
extern unsigned _TIE_xt_mmu_RDTLB0(unsigned ars);
|
||||
extern unsigned _TIE_xt_mmu_PDTLB(unsigned ars);
|
||||
extern void _TIE_xt_mmu_WDTLB(unsigned art, unsigned ars);
|
||||
extern void _TIE_xt_mmu_IITLB(unsigned ars);
|
||||
extern unsigned _TIE_xt_mmu_RITLB1(unsigned ars);
|
||||
extern unsigned _TIE_xt_mmu_RITLB0(unsigned ars);
|
||||
extern unsigned _TIE_xt_mmu_PITLB(unsigned ars);
|
||||
extern void _TIE_xt_mmu_WITLB(unsigned art, unsigned ars);
|
||||
#define XT_IDTLB _TIE_xt_mmu_IDTLB
|
||||
#define XT_RDTLB1 _TIE_xt_mmu_RDTLB1
|
||||
#define XT_RDTLB0 _TIE_xt_mmu_RDTLB0
|
||||
#define XT_PDTLB _TIE_xt_mmu_PDTLB
|
||||
#define XT_WDTLB _TIE_xt_mmu_WDTLB
|
||||
#define XT_IITLB _TIE_xt_mmu_IITLB
|
||||
#define XT_RITLB1 _TIE_xt_mmu_RITLB1
|
||||
#define XT_RITLB0 _TIE_xt_mmu_RITLB0
|
||||
#define XT_PITLB _TIE_xt_mmu_PITLB
|
||||
#define XT_WITLB _TIE_xt_mmu_WITLB
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_mmu_HEADER */
|
||||
47
extra_include/xtensa/tie/xt_mul.h
Normal file
47
extra_include/xtensa/tie/xt_mul.h
Normal file
@ -0,0 +1,47 @@
|
||||
/* Definitions for the xt_mul TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_mul_HEADER
|
||||
#define _XTENSA_xt_mul_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern int _TIE_xt_mul_MUL16S(short s, short t);
|
||||
extern unsigned _TIE_xt_mul_MUL16U(unsigned short s, unsigned short t);
|
||||
extern int _TIE_xt_mul_MULL(int s, int t);
|
||||
#define XT_MUL16S _TIE_xt_mul_MUL16S
|
||||
#define XT_MUL16U _TIE_xt_mul_MUL16U
|
||||
#define XT_MULL _TIE_xt_mul_MULL
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_mul_HEADER */
|
||||
53
extra_include/xtensa/tie/xt_timer.h
Normal file
53
extra_include/xtensa/tie/xt_timer.h
Normal file
@ -0,0 +1,53 @@
|
||||
/* Definitions for the xt_timer TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_timer_HEADER
|
||||
#define _XTENSA_xt_timer_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern unsigned _TIE_xt_timer_RSR_CCOUNT(void);
|
||||
extern void _TIE_xt_timer_WSR_CCOUNT(unsigned art);
|
||||
extern void _TIE_xt_timer_XSR_CCOUNT(unsigned art /*inout*/);
|
||||
extern unsigned _TIE_xt_timer_RSR_CCOMPARE0(void);
|
||||
extern void _TIE_xt_timer_WSR_CCOMPARE0(unsigned art);
|
||||
extern void _TIE_xt_timer_XSR_CCOMPARE0(unsigned art /*inout*/);
|
||||
#define XT_RSR_CCOUNT _TIE_xt_timer_RSR_CCOUNT
|
||||
#define XT_WSR_CCOUNT _TIE_xt_timer_WSR_CCOUNT
|
||||
#define XT_XSR_CCOUNT _TIE_xt_timer_XSR_CCOUNT
|
||||
#define XT_RSR_CCOMPARE0 _TIE_xt_timer_RSR_CCOMPARE0
|
||||
#define XT_WSR_CCOMPARE0 _TIE_xt_timer_WSR_CCOMPARE0
|
||||
#define XT_XSR_CCOMPARE0 _TIE_xt_timer_XSR_CCOMPARE0
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_timer_HEADER */
|
||||
43
extra_include/xtensa/tie/xt_trace.h
Normal file
43
extra_include/xtensa/tie/xt_trace.h
Normal file
@ -0,0 +1,43 @@
|
||||
/* Definitions for the xt_trace TIE package */
|
||||
|
||||
/*
|
||||
* Customer ID=7011; Build=0x2b6f6; Copyright (c) 2004 by Tensilica Inc. ALL RIGHTS RESERVED.
|
||||
* These coded instructions, statements, and computer programs are the
|
||||
* copyrighted works and confidential proprietary information of Tensilica Inc.
|
||||
* They may not be modified, copied, reproduced, distributed, or disclosed to
|
||||
* third parties in any manner, medium, or form, in whole or in part, without
|
||||
* the prior written consent of Tensilica Inc.
|
||||
*/
|
||||
|
||||
/* Do not modify. This is automatically generated.*/
|
||||
|
||||
#ifndef _XTENSA_xt_trace_HEADER
|
||||
#define _XTENSA_xt_trace_HEADER
|
||||
|
||||
#ifdef __XTENSA__
|
||||
#ifdef __XCC__
|
||||
|
||||
#include <xtensa/tie/xt_core.h>
|
||||
|
||||
/*
|
||||
* The following prototypes describe intrinsic functions
|
||||
* corresponding to TIE instructions. Some TIE instructions
|
||||
* may produce multiple results (designated as "out" operands
|
||||
* in the iclass section) or may have operands used as both
|
||||
* inputs and outputs (designated as "inout"). However, the C
|
||||
* and C++ languages do not provide syntax that can express
|
||||
* the in/out/inout constraints of TIE intrinsics.
|
||||
* Nevertheless, the compiler understands these constraints
|
||||
* and will check that the intrinsic functions are used
|
||||
* correctly. To improve the readability of these prototypes,
|
||||
* the "out" and "inout" parameters are marked accordingly
|
||||
* with comments.
|
||||
*/
|
||||
|
||||
extern void _TIE_xt_trace_WSR_MMID(unsigned art);
|
||||
#define XT_WSR_MMID _TIE_xt_trace_WSR_MMID
|
||||
|
||||
#endif /* __XCC__ */
|
||||
|
||||
#endif /* __XTENSA__ */
|
||||
#endif /* !_XTENSA_xt_trace_HEADER */
|
||||
Reference in New Issue
Block a user