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Convert ff_imdct_half_sse() to yasm.
This is to avoid split asm sections that attempt to preserve some registers between sections. Originally committed as revision 24869 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Alex Converse
@ -29,6 +29,23 @@
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%include "x86inc.asm"
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%include "x86inc.asm"
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%ifdef ARCH_X86_64
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%define pointer resq
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%else
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%define pointer resd
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%endif
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struc FFTContext
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.nbits: resd 1
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.reverse: resd 1
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.revtab: pointer 1
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.tmpbuf: pointer 1
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.mdctsize: resd 1
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.mdctbits: resd 1
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.tcos: pointer 1
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.tsin: pointer 1
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endstruc
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SECTION_RODATA
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SECTION_RODATA
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%define M_SQRT1_2 0.70710678118654752440
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%define M_SQRT1_2 0.70710678118654752440
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@ -428,6 +445,16 @@ DECL_PASS pass_interleave_3dn, PASS_BIG 0
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%define SECTION_REL
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%define SECTION_REL
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%endif
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%endif
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%macro FFT_DISPATCH 2; clobbers 5 GPRs, 8 XMMs
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lea r2, [dispatch_tab%1]
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mov r2, [r2 + (%2q-2)*gprsize]
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%ifdef PIC
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lea r3, [$$]
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add r2, r3
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%endif
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call r2
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%endmacro ; FFT_DISPATCH
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%macro DECL_FFT 2-3 ; nbits, cpu, suffix
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%macro DECL_FFT 2-3 ; nbits, cpu, suffix
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%xdefine list_of_fft fft4%2 SECTION_REL, fft8%2 SECTION_REL
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%xdefine list_of_fft fft4%2 SECTION_REL, fft8%2 SECTION_REL
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%if %1==5
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%if %1==5
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@ -464,13 +491,7 @@ section .text
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; On x86_32, this function does the register saving and restoring for all of fft.
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; On x86_32, this function does the register saving and restoring for all of fft.
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; The others pass args in registers and don't spill anything.
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; The others pass args in registers and don't spill anything.
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cglobal fft_dispatch%3%2, 2,5,8, z, nbits
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cglobal fft_dispatch%3%2, 2,5,8, z, nbits
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lea r2, [dispatch_tab%3%2]
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FFT_DISPATCH %3%2, nbits
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mov r2, [r2 + (nbitsq-2)*gprsize]
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%ifdef PIC
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lea r3, [$$]
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add r2, r3
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%endif
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call r2
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RET
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RET
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%endmacro ; DECL_FFT
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%endmacro ; DECL_FFT
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@ -481,3 +502,170 @@ DECL_FFT 4, _3dn, _interleave
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DECL_FFT 4, _3dn2
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DECL_FFT 4, _3dn2
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DECL_FFT 4, _3dn2, _interleave
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DECL_FFT 4, _3dn2, _interleave
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INIT_XMM
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%undef mulps
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%undef addps
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%undef subps
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%undef unpcklps
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%undef unpckhps
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%macro PREROTATER 5 ;-2*k, 2*k, input+n4, tcos+n8, tsin+n8
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movaps xmm0, [%3+%2*4]
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movaps xmm1, [%3+%1*4-0x10]
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movaps xmm2, xmm0
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shufps xmm0, xmm1, 0x88
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shufps xmm1, xmm2, 0x77
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movlps xmm4, [%4+%2*2]
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movlps xmm5, [%5+%2*2+0x0]
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movhps xmm4, [%4+%1*2-0x8]
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movhps xmm5, [%5+%1*2-0x8]
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movaps xmm2, xmm0
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movaps xmm3, xmm1
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mulps xmm0, xmm5
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mulps xmm1, xmm4
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mulps xmm2, xmm4
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mulps xmm3, xmm5
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subps xmm1, xmm0
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addps xmm2, xmm3
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movaps xmm0, xmm1
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unpcklps xmm1, xmm2
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unpckhps xmm0, xmm2
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%endmacro
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%macro PREROTATEW 3 ;addr1, addr2, xmm
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movlps %1, %3
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movhps %2, %3
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%endmacro
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%macro CMUL 6 ;j, xmm0, xmm1, 3, 4, 5
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movaps xmm6, [%4+%1*2]
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movaps %2, [%4+%1*2+0x10]
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movaps %3, xmm6
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movaps xmm7, %2
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mulps xmm6, [%5+%1*1]
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mulps %2, [%6+%1*1]
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mulps %3, [%6+%1*1]
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mulps xmm7, [%5+%1*1]
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subps %2, xmm6
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addps %3, xmm7
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%endmacro
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%macro POSROTATESHUF 5 ;j, k, z+n8, tcos+n8, tsin+n8
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.post:
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CMUL %1, xmm0, xmm1, %3, %4, %5
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CMUL %2, xmm4, xmm5, %3, %4, %5
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shufps xmm1, xmm1, 0x1b
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shufps xmm5, xmm5, 0x1b
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movaps xmm6, xmm4
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unpckhps xmm4, xmm1
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unpcklps xmm6, xmm1
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movaps xmm2, xmm0
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unpcklps xmm0, xmm5
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unpckhps xmm2, xmm5
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movaps [%3+%2*2], xmm6
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movaps [%3+%2*2+0x10], xmm4
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movaps [%3+%1*2], xmm0
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movaps [%3+%1*2+0x10], xmm2
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sub %2, 0x10
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add %1, 0x10
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jl .post
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%endmacro
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cglobal imdct_half_sse, 3,7,8; FFTContext *s, FFTSample *output, const FFTSample *input
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%ifdef ARCH_X86_64
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%define rrevtab r10
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%define rtcos r11
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%define rtsin r12
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push r10
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push r11
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push r12
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push r13
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push r14
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%else
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%define rrevtab r6
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%define rtsin r6
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%define rtcos r5
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%endif
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mov r3d, [r0+FFTContext.mdctsize]
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add r2, r3
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shr r3, 1
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mov rtcos, [r0+FFTContext.tcos]
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mov rtsin, [r0+FFTContext.tsin]
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add rtcos, r3
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add rtsin, r3
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%ifndef ARCH_X86_64
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push rtcos
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push rtsin
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%endif
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shr r3, 1
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mov rrevtab, [r0+FFTContext.revtab]
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add rrevtab, r3
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%ifndef ARCH_X86_64
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push rrevtab
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%endif
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sub r3, 4
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%ifdef ARCH_X86_64
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xor r4, r4
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sub r4, r3
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%endif
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.pre:
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%ifndef ARCH_X86_64
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;unspill
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xor r4, r4
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sub r4, r3
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mov rtsin, [esp+4]
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mov rtcos, [esp+8]
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%endif
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PREROTATER r4, r3, r2, rtcos, rtsin
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%ifdef ARCH_X86_64
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movzx r5, word [rrevtab+r4*1-4]
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movzx r6, word [rrevtab+r4*1-2]
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movzx r13, word [rrevtab+r3*1]
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movzx r14, word [rrevtab+r3*1+2]
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PREROTATEW [r1+r5 *8], [r1+r6 *8], xmm0
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PREROTATEW [r1+r13*8], [r1+r14*8], xmm1
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add r4, 4
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%else
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mov r6, [esp]
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movzx r5, word [r6+r4*1-4]
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movzx r4, word [r6+r4*1-2]
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PREROTATEW [r1+r5*8], [r1+r4*8], xmm0
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movzx r5, word [r6+r3*1]
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movzx r4, word [r6+r3*1+2]
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PREROTATEW [r1+r5*8], [r1+r4*8], xmm1
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%endif
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sub r3, 4
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jns .pre
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mov r5, r0
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mov r6, r1
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mov r0, r1
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mov r1d, [r5+FFTContext.nbits]
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FFT_DISPATCH _sse, r1
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mov r0d, [r5+FFTContext.mdctsize]
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add r6, r0
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shr r0, 1
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%ifndef ARCH_X86_64
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%define rtcos r2
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%define rtsin r3
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mov rtcos, [esp+8]
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mov rtsin, [esp+4]
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%endif
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neg r0
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mov r1, -16
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sub r1, r0
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POSROTATESHUF r0, r1, r6, rtcos, rtsin
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%ifdef ARCH_X86_64
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pop r14
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pop r13
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pop r12
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pop r11
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pop r10
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%else
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add esp, 12
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%endif
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RET
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@ -71,107 +71,6 @@ void ff_fft_permute_sse(FFTContext *s, FFTComplex *z)
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memcpy(z, s->tmp_buf, n*sizeof(FFTComplex));
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memcpy(z, s->tmp_buf, n*sizeof(FFTComplex));
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}
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}
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void ff_imdct_half_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
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{
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av_unused x86_reg i, j, k, l;
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long n = 1 << s->mdct_bits;
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long n2 = n >> 1;
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long n4 = n >> 2;
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long n8 = n >> 3;
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const uint16_t *revtab = s->revtab + n8;
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const FFTSample *tcos = s->tcos;
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const FFTSample *tsin = s->tsin;
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FFTComplex *z = (FFTComplex *)output;
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/* pre rotation */
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for(k=n8-2; k>=0; k-=2) {
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__asm__ volatile(
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"movaps (%2,%1,2), %%xmm0 \n" // { z[k].re, z[k].im, z[k+1].re, z[k+1].im }
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"movaps -16(%2,%0,2), %%xmm1 \n" // { z[-k-2].re, z[-k-2].im, z[-k-1].re, z[-k-1].im }
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"movaps %%xmm0, %%xmm2 \n"
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"shufps $0x88, %%xmm1, %%xmm0 \n" // { z[k].re, z[k+1].re, z[-k-2].re, z[-k-1].re }
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"shufps $0x77, %%xmm2, %%xmm1 \n" // { z[-k-1].im, z[-k-2].im, z[k+1].im, z[k].im }
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"movlps (%3,%1), %%xmm4 \n"
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"movlps (%4,%1), %%xmm5 \n"
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"movhps -8(%3,%0), %%xmm4 \n" // { cos[k], cos[k+1], cos[-k-2], cos[-k-1] }
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"movhps -8(%4,%0), %%xmm5 \n" // { sin[k], sin[k+1], sin[-k-2], sin[-k-1] }
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"movaps %%xmm0, %%xmm2 \n"
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"movaps %%xmm1, %%xmm3 \n"
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"mulps %%xmm5, %%xmm0 \n" // re*sin
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"mulps %%xmm4, %%xmm1 \n" // im*cos
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"mulps %%xmm4, %%xmm2 \n" // re*cos
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"mulps %%xmm5, %%xmm3 \n" // im*sin
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"subps %%xmm0, %%xmm1 \n" // -> re
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"addps %%xmm3, %%xmm2 \n" // -> im
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"movaps %%xmm1, %%xmm0 \n"
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"unpcklps %%xmm2, %%xmm1 \n" // { z[k], z[k+1] }
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"unpckhps %%xmm2, %%xmm0 \n" // { z[-k-2], z[-k-1] }
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::"r"(-4*k), "r"(4*k),
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"r"(input+n4), "r"(tcos+n8), "r"(tsin+n8)
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);
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#if ARCH_X86_64
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// if we have enough regs, don't let gcc make the luts latency-bound
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// but if not, latency is faster than spilling
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__asm__("movlps %%xmm0, %0 \n"
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"movhps %%xmm0, %1 \n"
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"movlps %%xmm1, %2 \n"
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"movhps %%xmm1, %3 \n"
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:"=m"(z[revtab[-k-2]]),
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"=m"(z[revtab[-k-1]]),
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"=m"(z[revtab[ k ]]),
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"=m"(z[revtab[ k+1]])
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);
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#else
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__asm__("movlps %%xmm0, %0" :"=m"(z[revtab[-k-2]]));
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__asm__("movhps %%xmm0, %0" :"=m"(z[revtab[-k-1]]));
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__asm__("movlps %%xmm1, %0" :"=m"(z[revtab[ k ]]));
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__asm__("movhps %%xmm1, %0" :"=m"(z[revtab[ k+1]]));
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#endif
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}
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ff_fft_dispatch_sse(z, s->nbits);
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/* post rotation + reinterleave + reorder */
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#define CMUL(j,xmm0,xmm1)\
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"movaps (%2,"#j",2), %%xmm6 \n"\
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"movaps 16(%2,"#j",2), "#xmm0"\n"\
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"movaps %%xmm6, "#xmm1"\n"\
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"movaps "#xmm0",%%xmm7 \n"\
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"mulps (%3,"#j"), %%xmm6 \n"\
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"mulps (%4,"#j"), "#xmm0"\n"\
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"mulps (%4,"#j"), "#xmm1"\n"\
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"mulps (%3,"#j"), %%xmm7 \n"\
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"subps %%xmm6, "#xmm0"\n"\
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"addps %%xmm7, "#xmm1"\n"
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j = -n2;
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k = n2-16;
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__asm__ volatile(
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"1: \n"
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CMUL(%0, %%xmm0, %%xmm1)
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CMUL(%1, %%xmm4, %%xmm5)
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"shufps $0x1b, %%xmm1, %%xmm1 \n"
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"shufps $0x1b, %%xmm5, %%xmm5 \n"
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"movaps %%xmm4, %%xmm6 \n"
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"unpckhps %%xmm1, %%xmm4 \n"
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"unpcklps %%xmm1, %%xmm6 \n"
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"movaps %%xmm0, %%xmm2 \n"
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"unpcklps %%xmm5, %%xmm0 \n"
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"unpckhps %%xmm5, %%xmm2 \n"
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"movaps %%xmm6, (%2,%1,2) \n"
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"movaps %%xmm4, 16(%2,%1,2) \n"
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"movaps %%xmm0, (%2,%0,2) \n"
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"movaps %%xmm2, 16(%2,%0,2) \n"
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"sub $16, %1 \n"
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"add $16, %0 \n"
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"jl 1b \n"
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:"+&r"(j), "+&r"(k)
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:"r"(z+n8), "r"(tcos+n8), "r"(tsin+n8)
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:"memory"
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);
|
|
||||||
}
|
|
||||||
|
|
||||||
void ff_imdct_calc_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
|
void ff_imdct_calc_sse(FFTContext *s, FFTSample *output, const FFTSample *input)
|
||||||
{
|
{
|
||||||
x86_reg j, k;
|
x86_reg j, k;
|
||||||
|
|||||||
Reference in New Issue
Block a user