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x86inc improvements for 64-bit
Add support for all x86-64 registers Prefer caller-saved register over callee-saved on WIN64 Support up to 15 function arguments Also (by Ronald S. Bultje) Fix up our asm to work with new x86inc.asm. Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com> Signed-off-by: Justin Ruggles <justin.ruggles@gmail.com>
This commit is contained in:
Henrik Gramner
committed by
Justin Ruggles
Justin Ruggles
parent
e1ce756844
commit
729f90e268
@ -1,11 +1,12 @@
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;*****************************************************************************
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;* x86inc.asm: x264asm abstraction layer
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;*****************************************************************************
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;* Copyright (C) 2005-2011 x264 project
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;* Copyright (C) 2005-2012 x264 project
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;*
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;* Authors: Loren Merritt <lorenm@u.washington.edu>
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;* Anton Mitrofanov <BugMaster@narod.ru>
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;* Jason Garrett-Glaser <darkshikari@gmail.com>
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;* Henrik Gramner <hengar-6@student.ltu.se>
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;*
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;* Permission to use, copy, modify, and/or distribute this software for any
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;* purpose with or without fee is hereby granted, provided that the above
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@ -95,6 +96,9 @@
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default rel
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%endif
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; Always use long nops (reduces 0x90 spam in disassembly on x86_32)
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CPU amdnop
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; Macros to eliminate most code duplication between x86_32 and x86_64:
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; Currently this works only for leaf functions which load all their arguments
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; into registers at the start, and make no other use of the stack. Luckily that
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@ -128,18 +132,20 @@
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; rNm is the original location of arg N (a register or on the stack), dword
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; rNmp is native size
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%macro DECLARE_REG 6
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%macro DECLARE_REG 5-6
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%define r%1q %2
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%define r%1d %3
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%define r%1w %4
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%define r%1b %5
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%define r%1m %6
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%ifid %6 ; i.e. it's a register
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%if %0 == 5
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%define r%1m %3
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%define r%1mp %2
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%elif ARCH_X86_64 ; memory
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%define r%1mp qword %6
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%define r%1m [rsp + stack_offset + %6]
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%define r%1mp qword r %+ %1m
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%else
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%define r%1mp dword %6
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%define r%1m [esp + stack_offset + %6]
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%define r%1mp dword r %+ %1m
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%endif
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%define r%1 %2
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%endmacro
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@ -187,7 +193,7 @@ DECLARE_REG_SIZE bp, bpl
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%endrep
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%endmacro
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DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9
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DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14
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%if ARCH_X86_64
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%define gprsize 8
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@ -205,6 +211,33 @@ DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9
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%assign stack_offset stack_offset-gprsize
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%endmacro
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%macro PUSH_IF_USED 1-*
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%rep %0
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%if %1 < regs_used
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PUSH r%1
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%endif
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%rotate 1
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%endrep
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%endmacro
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%macro POP_IF_USED 1-*
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%rep %0
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%if %1 < regs_used
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pop r%1
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%endif
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%rotate 1
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%endrep
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%endmacro
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%macro LOAD_IF_USED 1-*
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%rep %0
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%if %1 < num_args
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mov r%1, r %+ %1 %+ mp
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%endif
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%rotate 1
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%endrep
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%endmacro
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%macro SUB 2
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sub %1, %2
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%ifidn %1, rsp
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@ -272,39 +305,34 @@ DECLARE_REG_TMP_SIZE 0,1,2,3,4,5,6,7,8,9
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%if WIN64 ; Windows x64 ;=================================================
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DECLARE_REG 0, rcx, ecx, cx, cl, ecx
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DECLARE_REG 1, rdx, edx, dx, dl, edx
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DECLARE_REG 2, r8, r8d, r8w, r8b, r8d
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DECLARE_REG 3, r9, r9d, r9w, r9b, r9d
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DECLARE_REG 4, rdi, edi, di, dil, [rsp + stack_offset + 40]
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DECLARE_REG 5, rsi, esi, si, sil, [rsp + stack_offset + 48]
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DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
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%define r7m [rsp + stack_offset + 64]
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%define r8m [rsp + stack_offset + 72]
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%macro LOAD_IF_USED 2 ; reg_id, number_of_args
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%if %1 < %2
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mov r%1, [rsp + stack_offset + 8 + %1*8]
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%endif
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%endmacro
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DECLARE_REG 0, rcx, ecx, cx, cl
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DECLARE_REG 1, rdx, edx, dx, dl
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DECLARE_REG 2, R8, R8D, R8W, R8B
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DECLARE_REG 3, R9, R9D, R9W, R9B
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DECLARE_REG 4, R10, R10D, R10W, R10B, 40
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DECLARE_REG 5, R11, R11D, R11W, R11B, 48
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DECLARE_REG 6, rax, eax, ax, al, 56
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DECLARE_REG 7, rdi, edi, di, dil, 64
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DECLARE_REG 8, rsi, esi, si, sil, 72
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DECLARE_REG 9, rbx, ebx, bx, bl, 80
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DECLARE_REG 10, rbp, ebp, bp, bpl, 88
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DECLARE_REG 11, R12, R12D, R12W, R12B, 96
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DECLARE_REG 12, R13, R13D, R13W, R13B, 104
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DECLARE_REG 13, R14, R14D, R14W, R14B, 112
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DECLARE_REG 14, R15, R15D, R15W, R15B, 120
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%macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names...
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ASSERT %2 >= %1
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%assign num_args %1
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%assign regs_used %2
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ASSERT regs_used <= 7
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%if regs_used > 4
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push r4
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push r5
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%assign stack_offset stack_offset+16
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%endif
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ASSERT regs_used >= num_args
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ASSERT regs_used <= 15
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PUSH_IF_USED 7, 8, 9, 10, 11, 12, 13, 14
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%if mmsize == 8
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%assign xmm_regs_used 0
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%else
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WIN64_SPILL_XMM %3
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%endif
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LOAD_IF_USED 4, %1
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LOAD_IF_USED 5, %1
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LOAD_IF_USED 6, %1
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LOAD_IF_USED 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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DEFINE_ARGS %4
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%endmacro
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@ -312,12 +340,11 @@ DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
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%assign xmm_regs_used %1
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ASSERT xmm_regs_used <= 16
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%if xmm_regs_used > 6
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sub rsp, (xmm_regs_used-6)*16+16
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%assign stack_offset stack_offset+(xmm_regs_used-6)*16+16
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SUB rsp, (xmm_regs_used-6)*16+16
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%assign %%i xmm_regs_used
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%rep (xmm_regs_used-6)
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%assign %%i %%i-1
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movdqa [rsp + (%%i-6)*16+8], xmm %+ %%i
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movdqa [rsp + (%%i-6)*16+(~stack_offset&8)], xmm %+ %%i
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%endrep
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%endif
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%endmacro
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@ -327,7 +354,7 @@ DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
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%assign %%i xmm_regs_used
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%rep (xmm_regs_used-6)
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%assign %%i %%i-1
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movdqa xmm %+ %%i, [%1 + (%%i-6)*16+8]
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movdqa xmm %+ %%i, [%1 + (%%i-6)*16+(~stack_offset&8)]
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%endrep
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add %1, (xmm_regs_used-6)*16+16
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%endif
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@ -341,15 +368,12 @@ DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
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%macro RET 0
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WIN64_RESTORE_XMM_INTERNAL rsp
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%if regs_used > 4
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pop r5
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pop r4
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%endif
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POP_IF_USED 14, 13, 12, 11, 10, 9, 8, 7
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ret
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%endmacro
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%macro REP_RET 0
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%if regs_used > 4 || xmm_regs_used > 6
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%if regs_used > 7 || xmm_regs_used > 6
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RET
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%else
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rep ret
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@ -358,92 +382,80 @@ DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 56]
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%elif ARCH_X86_64 ; *nix x64 ;=============================================
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DECLARE_REG 0, rdi, edi, di, dil, edi
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DECLARE_REG 1, rsi, esi, si, sil, esi
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DECLARE_REG 2, rdx, edx, dx, dl, edx
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DECLARE_REG 3, rcx, ecx, cx, cl, ecx
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DECLARE_REG 4, r8, r8d, r8w, r8b, r8d
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DECLARE_REG 5, r9, r9d, r9w, r9b, r9d
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DECLARE_REG 6, rax, eax, ax, al, [rsp + stack_offset + 8]
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%define r7m [rsp + stack_offset + 16]
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%define r8m [rsp + stack_offset + 24]
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%macro LOAD_IF_USED 2 ; reg_id, number_of_args
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%if %1 < %2
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mov r%1, [rsp - 40 + %1*8]
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%endif
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%endmacro
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DECLARE_REG 0, rdi, edi, di, dil
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DECLARE_REG 1, rsi, esi, si, sil
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DECLARE_REG 2, rdx, edx, dx, dl
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DECLARE_REG 3, rcx, ecx, cx, cl
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DECLARE_REG 4, R8, R8D, R8W, R8B
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DECLARE_REG 5, R9, R9D, R9W, R9B
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DECLARE_REG 6, rax, eax, ax, al, 8
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DECLARE_REG 7, R10, R10D, R10W, R10B, 16
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DECLARE_REG 8, R11, R11D, R11W, R11B, 24
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DECLARE_REG 9, rbx, ebx, bx, bl, 32
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DECLARE_REG 10, rbp, ebp, bp, bpl, 40
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DECLARE_REG 11, R12, R12D, R12W, R12B, 48
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DECLARE_REG 12, R13, R13D, R13W, R13B, 56
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DECLARE_REG 13, R14, R14D, R14W, R14B, 64
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DECLARE_REG 14, R15, R15D, R15W, R15B, 72
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%macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
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ASSERT %2 >= %1
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ASSERT %2 <= 7
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LOAD_IF_USED 6, %1
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%assign num_args %1
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%assign regs_used %2
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ASSERT regs_used >= num_args
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ASSERT regs_used <= 15
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PUSH_IF_USED 9, 10, 11, 12, 13, 14
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LOAD_IF_USED 6, 7, 8, 9, 10, 11, 12, 13, 14
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DEFINE_ARGS %4
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%endmacro
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%macro RET 0
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POP_IF_USED 14, 13, 12, 11, 10, 9
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ret
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%endmacro
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%macro REP_RET 0
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rep ret
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%if regs_used > 9
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RET
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%else
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rep ret
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%endif
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%endmacro
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%else ; X86_32 ;==============================================================
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DECLARE_REG 0, eax, eax, ax, al, [esp + stack_offset + 4]
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DECLARE_REG 1, ecx, ecx, cx, cl, [esp + stack_offset + 8]
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DECLARE_REG 2, edx, edx, dx, dl, [esp + stack_offset + 12]
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DECLARE_REG 3, ebx, ebx, bx, bl, [esp + stack_offset + 16]
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DECLARE_REG 4, esi, esi, si, null, [esp + stack_offset + 20]
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DECLARE_REG 5, edi, edi, di, null, [esp + stack_offset + 24]
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DECLARE_REG 6, ebp, ebp, bp, null, [esp + stack_offset + 28]
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%define r7m [esp + stack_offset + 32]
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%define r8m [esp + stack_offset + 36]
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DECLARE_REG 0, eax, eax, ax, al, 4
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DECLARE_REG 1, ecx, ecx, cx, cl, 8
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DECLARE_REG 2, edx, edx, dx, dl, 12
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DECLARE_REG 3, ebx, ebx, bx, bl, 16
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DECLARE_REG 4, esi, esi, si, null, 20
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DECLARE_REG 5, edi, edi, di, null, 24
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DECLARE_REG 6, ebp, ebp, bp, null, 28
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%define rsp esp
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%macro PUSH_IF_USED 1 ; reg_id
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%if %1 < regs_used
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push r%1
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%assign stack_offset stack_offset+4
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%endif
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%macro DECLARE_ARG 1-*
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%rep %0
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%define r%1m [esp + stack_offset + 4*%1 + 4]
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%define r%1mp dword r%1m
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%rotate 1
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%endrep
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%endmacro
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%macro POP_IF_USED 1 ; reg_id
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%if %1 < regs_used
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pop r%1
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%endif
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%endmacro
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%macro LOAD_IF_USED 2 ; reg_id, number_of_args
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%if %1 < %2
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mov r%1, [esp + stack_offset + 4 + %1*4]
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%endif
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%endmacro
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DECLARE_ARG 7, 8, 9, 10, 11, 12, 13, 14
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%macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
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ASSERT %2 >= %1
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%assign num_args %1
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%assign regs_used %2
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ASSERT regs_used <= 7
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PUSH_IF_USED 3
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PUSH_IF_USED 4
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PUSH_IF_USED 5
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PUSH_IF_USED 6
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LOAD_IF_USED 0, %1
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LOAD_IF_USED 1, %1
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LOAD_IF_USED 2, %1
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LOAD_IF_USED 3, %1
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LOAD_IF_USED 4, %1
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LOAD_IF_USED 5, %1
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LOAD_IF_USED 6, %1
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%if regs_used > 7
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%assign regs_used 7
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%endif
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ASSERT regs_used >= num_args
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PUSH_IF_USED 3, 4, 5, 6
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LOAD_IF_USED 0, 1, 2, 3, 4, 5, 6
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DEFINE_ARGS %4
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%endmacro
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%macro RET 0
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POP_IF_USED 6
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POP_IF_USED 5
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POP_IF_USED 4
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POP_IF_USED 3
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POP_IF_USED 6, 5, 4, 3
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ret
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%endmacro
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@ -464,8 +476,6 @@ DECLARE_REG 6, ebp, ebp, bp, null, [esp + stack_offset + 28]
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%endmacro
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%endif
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;=============================================================================
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; arch-independent part
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;=============================================================================
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