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https://github.com/FFmpeg/FFmpeg.git
synced 2025-07-01 21:48:15 +08:00
ppc: remove disabled code
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@ -627,16 +627,6 @@ void put_pixels16_altivec(uint8_t *block, const uint8_t *pixels, int line_size,
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// it's faster than -funroll-loops, but using
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// it's faster than -funroll-loops, but using
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// -funroll-loops w/ this is bad - 74 cycles again.
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// -funroll-loops w/ this is bad - 74 cycles again.
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// all this is on a 7450, tuning for the 7450
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// all this is on a 7450, tuning for the 7450
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#if 0
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for (i = 0; i < h; i++) {
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pixelsv1 = vec_ld(0, pixels);
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pixelsv2 = vec_ld(16, pixels);
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vec_st(vec_perm(pixelsv1, pixelsv2, perm),
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0, block);
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pixels+=line_size;
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block +=line_size;
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}
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#else
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for (i = 0; i < h; i += 4) {
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for (i = 0; i < h; i += 4) {
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pixelsv1 = vec_ld( 0, pixels);
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pixelsv1 = vec_ld( 0, pixels);
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pixelsv2 = vec_ld(15, pixels);
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pixelsv2 = vec_ld(15, pixels);
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@ -657,7 +647,6 @@ void put_pixels16_altivec(uint8_t *block, const uint8_t *pixels, int line_size,
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pixels+=line_size_4;
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pixels+=line_size_4;
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block +=line_size_4;
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block +=line_size_4;
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}
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}
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#endif
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}
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}
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/* next one assumes that ((line_size % 16) == 0) */
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/* next one assumes that ((line_size % 16) == 0) */
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@ -48,7 +48,6 @@ static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
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{
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{
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register int misal = ((unsigned long)blocks & 0x00000010);
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register int misal = ((unsigned long)blocks & 0x00000010);
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register int i = 0;
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register int i = 0;
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#if 1
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if (misal) {
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if (misal) {
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((unsigned long*)blocks)[0] = 0L;
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((unsigned long*)blocks)[0] = 0L;
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((unsigned long*)blocks)[1] = 0L;
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((unsigned long*)blocks)[1] = 0L;
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@ -66,9 +65,6 @@ static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
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((unsigned long*)blocks)[191] = 0L;
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((unsigned long*)blocks)[191] = 0L;
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i += 16;
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i += 16;
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}
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}
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#else
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memset(blocks, 0, sizeof(DCTELEM)*6*64);
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#endif
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}
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}
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/* same as above, when dcbzl clear a whole 128B cache line
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/* same as above, when dcbzl clear a whole 128B cache line
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@ -78,7 +74,6 @@ static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
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{
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{
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register int misal = ((unsigned long)blocks & 0x0000007f);
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register int misal = ((unsigned long)blocks & 0x0000007f);
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register int i = 0;
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register int i = 0;
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#if 1
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if (misal) {
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if (misal) {
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// we could probably also optimize this case,
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// we could probably also optimize this case,
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// but there's not much point as the machines
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// but there's not much point as the machines
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@ -89,9 +84,6 @@ static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
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for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
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for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
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__asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
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__asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
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}
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}
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#else
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memset(blocks, 0, sizeof(DCTELEM)*6*64);
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#endif
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}
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}
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#else
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#else
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static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
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static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
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@ -265,7 +265,6 @@ void fdct_altivec(int16_t *block)
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* conversion to vector float. The following code section takes advantage
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* conversion to vector float. The following code section takes advantage
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* of this.
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* of this.
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*/
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*/
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#if 1
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/* fdct rows {{{ */
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/* fdct rows {{{ */
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x0 = ((vector float)vec_add(vs16(b00), vs16(b70)));
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x0 = ((vector float)vec_add(vs16(b00), vs16(b70)));
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x7 = ((vector float)vec_sub(vs16(b00), vs16(b70)));
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x7 = ((vector float)vec_sub(vs16(b00), vs16(b70)));
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@ -389,29 +388,6 @@ void fdct_altivec(int16_t *block)
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b31 = vec_add(b31, x2);
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b31 = vec_add(b31, x2);
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b11 = vec_add(b11, x3);
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b11 = vec_add(b11, x3);
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/* }}} */
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/* }}} */
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#else
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/* convert to float {{{ */
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#define CTF(n) \
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vs32(b##n##1) = vec_unpackl(vs16(b##n##0)); \
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vs32(b##n##0) = vec_unpackh(vs16(b##n##0)); \
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b##n##1 = vec_ctf(vs32(b##n##1), 0); \
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b##n##0 = vec_ctf(vs32(b##n##0), 0); \
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CTF(0);
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CTF(1);
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CTF(2);
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CTF(3);
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CTF(4);
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CTF(5);
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CTF(6);
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CTF(7);
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#undef CTF
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/* }}} */
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FDCTROW(b00, b10, b20, b30, b40, b50, b60, b70);
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FDCTROW(b01, b11, b21, b31, b41, b51, b61, b71);
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#endif
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/* 8x8 matrix transpose (vector float[8][2]) {{{ */
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/* 8x8 matrix transpose (vector float[8][2]) {{{ */
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@ -515,21 +515,6 @@ static void dct_unquantize_h263_altivec(MpegEncContext *s,
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qaddv = vec_splat((vec_s16)vec_lde(0, &qadd8), 0);
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qaddv = vec_splat((vec_s16)vec_lde(0, &qadd8), 0);
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nqaddv = vec_sub(vczero, qaddv);
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nqaddv = vec_sub(vczero, qaddv);
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#if 0 // block *is* 16 bytes-aligned, it seems.
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// first make sure block[j] is 16 bytes-aligned
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for(j = 0; (j <= nCoeffs) && ((((unsigned long)block) + (j << 1)) & 0x0000000F) ; j++) {
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level = block[j];
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if (level) {
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if (level < 0) {
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level = level * qmul - qadd;
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} else {
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level = level * qmul + qadd;
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}
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block[j] = level;
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}
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}
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#endif
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// vectorize all the 16 bytes-aligned blocks
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// vectorize all the 16 bytes-aligned blocks
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// of 8 elements
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// of 8 elements
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for(; (j + 7) <= nCoeffs ; j+=8) {
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for(; (j + 7) <= nCoeffs ; j+=8) {
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@ -599,9 +584,6 @@ void MPV_common_init_altivec(MpegEncContext *s)
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if ((s->avctx->dct_algo == FF_DCT_AUTO) ||
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if ((s->avctx->dct_algo == FF_DCT_AUTO) ||
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(s->avctx->dct_algo == FF_DCT_ALTIVEC)) {
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(s->avctx->dct_algo == FF_DCT_ALTIVEC)) {
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#if 0 /* seems to cause trouble under some circumstances */
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s->dct_quantize = dct_quantize_altivec;
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#endif
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s->dct_unquantize_h263_intra = dct_unquantize_h263_altivec;
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s->dct_unquantize_h263_intra = dct_unquantize_h263_altivec;
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s->dct_unquantize_h263_inter = dct_unquantize_h263_altivec;
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s->dct_unquantize_h263_inter = dct_unquantize_h263_altivec;
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}
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}
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