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35d4f05c4e
Moves the implementation of Registers.Get out of the backends and into proc where it can be implemented only once per architecture.
79 lines
3.4 KiB
Go
79 lines
3.4 KiB
Go
// TODO: disassembler support should be compiled in unconditionally,
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// instead of being decided by the build-target architecture, and be
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// part of the Arch object instead.
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package proc
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import (
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"github.com/go-delve/delve/pkg/dwarf/op"
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"github.com/go-delve/delve/pkg/dwarf/regnum"
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"golang.org/x/arch/x86/x86asm"
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)
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func i386AsmDecode(asmInst *AsmInstruction, mem []byte, regs *op.DwarfRegisters, memrw MemoryReadWriter, bi *BinaryInfo) error {
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return x86AsmDecode(asmInst, mem, regs, memrw, bi, 32)
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}
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// Possible stacksplit prologues are inserted by stacksplit in
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// $GOROOT/src/cmd/internal/obj/x86/obj6.go.
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// If 386 on linux when pie, the stacksplit prologue beigin with `call __x86.get_pc_thunk.` sometime.
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var prologuesI386 []opcodeSeq
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func init() {
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var i386GetPcIns = opcodeSeq{uint64(x86asm.CALL)}
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var tinyStacksplit = opcodeSeq{uint64(x86asm.CMP), uint64(x86asm.JBE)}
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var smallStacksplit = opcodeSeq{uint64(x86asm.LEA), uint64(x86asm.CMP), uint64(x86asm.JBE)}
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var bigStacksplit = opcodeSeq{uint64(x86asm.MOV), uint64(x86asm.CMP), uint64(x86asm.JE), uint64(x86asm.LEA), uint64(x86asm.SUB), uint64(x86asm.CMP), uint64(x86asm.JBE)}
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var unixGetG = opcodeSeq{uint64(x86asm.MOV), uint64(x86asm.MOV)}
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prologuesI386 = make([]opcodeSeq, 0, 2*3)
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for _, getPcIns := range []opcodeSeq{{}, i386GetPcIns} {
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for _, getG := range []opcodeSeq{unixGetG} { // TODO(chainhelen), need to support other OSs.
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for _, stacksplit := range []opcodeSeq{tinyStacksplit, smallStacksplit, bigStacksplit} {
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prologue := make(opcodeSeq, 0, len(getPcIns)+len(getG)+len(stacksplit))
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prologue = append(prologue, getPcIns...)
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prologue = append(prologue, getG...)
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prologue = append(prologue, stacksplit...)
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prologuesI386 = append(prologuesI386, prologue)
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}
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}
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}
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}
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var i386AsmRegisters = map[int]asmRegister{
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// 8-bit
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int(x86asm.AL): asmRegister{regnum.I386_Eax, 0, mask8},
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int(x86asm.CL): asmRegister{regnum.I386_Ecx, 0, mask8},
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int(x86asm.DL): asmRegister{regnum.I386_Edx, 0, mask8},
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int(x86asm.BL): asmRegister{regnum.I386_Ebx, 0, mask8},
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int(x86asm.AH): asmRegister{regnum.I386_Eax, 8, mask8},
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int(x86asm.CH): asmRegister{regnum.I386_Ecx, 8, mask8},
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int(x86asm.DH): asmRegister{regnum.I386_Edx, 8, mask8},
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int(x86asm.BH): asmRegister{regnum.I386_Ebx, 8, mask8},
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int(x86asm.SPB): asmRegister{regnum.I386_Esp, 0, mask8},
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int(x86asm.BPB): asmRegister{regnum.I386_Ebp, 0, mask8},
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int(x86asm.SIB): asmRegister{regnum.I386_Esi, 0, mask8},
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int(x86asm.DIB): asmRegister{regnum.I386_Edi, 0, mask8},
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// 16-bit
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int(x86asm.AX): asmRegister{regnum.I386_Eax, 0, mask16},
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int(x86asm.CX): asmRegister{regnum.I386_Ecx, 0, mask16},
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int(x86asm.DX): asmRegister{regnum.I386_Edx, 0, mask16},
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int(x86asm.BX): asmRegister{regnum.I386_Ebx, 0, mask16},
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int(x86asm.SP): asmRegister{regnum.I386_Esp, 0, mask16},
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int(x86asm.BP): asmRegister{regnum.I386_Ebp, 0, mask16},
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int(x86asm.SI): asmRegister{regnum.I386_Esi, 0, mask16},
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int(x86asm.DI): asmRegister{regnum.I386_Edi, 0, mask16},
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// 32-bit
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int(x86asm.EAX): asmRegister{regnum.I386_Eax, 0, mask32},
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int(x86asm.ECX): asmRegister{regnum.I386_Ecx, 0, mask32},
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int(x86asm.EDX): asmRegister{regnum.I386_Edx, 0, mask32},
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int(x86asm.EBX): asmRegister{regnum.I386_Ebx, 0, mask32},
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int(x86asm.ESP): asmRegister{regnum.I386_Esp, 0, mask32},
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int(x86asm.EBP): asmRegister{regnum.I386_Ebp, 0, mask32},
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int(x86asm.ESI): asmRegister{regnum.I386_Esi, 0, mask32},
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int(x86asm.EDI): asmRegister{regnum.I386_Edi, 0, mask32},
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}
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