Files
binutils-gdb/sim/testsuite
Jaydeep Patil 1c37b30945 sim/riscv: fix JALR instruction simulation
Fix 32bit 'jalr rd,ra,imm' integer instruction, where RD was written
before using it to calculate destination address.

This commit also improves testutils.inc for riscv; make use of
pushsection and popsection when adding things to .data, and setup the
%gp global pointer register within the 'start' macro.

Approved-By: Andrew Burgess <aburgess@redhat.com>
2023-10-18 17:55:31 +01:00
..
2023-08-19 12:41:32 +09:30
2023-10-11 16:31:11 -06:00
2022-04-06 11:10:40 -04:00