Jiawei f0bdf8c169 RISC-V: Add Smrnmi extension csrs. ...

This patch support Smrnmi extension[1],
The csrs address can be find in[2].

[1] 35eb3948bf
[2] https://github.com/riscv/riscv-isa-manual/blob/smrnmi-1.0/src/priv-csrs.adoc

bfd/ChangeLog:

	* elfxx-riscv.c: New extension.

gas/ChangeLog:

	* NEWS: Add Smrnmi extension support.
	* config/tc-riscv.c (enum riscv_csr_class): New extension class.
	(riscv_csr_address): Ditto.
	* testsuite/gas/riscv/csr-version-1p10.d: New csrs.
	* testsuite/gas/riscv/csr-version-1p10.l: Ditto.
	* testsuite/gas/riscv/csr-version-1p11.d: Ditto.
	* testsuite/gas/riscv/csr-version-1p11.l: Ditto.
	* testsuite/gas/riscv/csr-version-1p12.d: Ditto.
	* testsuite/gas/riscv/csr-version-1p12.l: Ditto.
	* testsuite/gas/riscv/csr.s:  Ditto.
	* testsuite/gas/riscv/march-help.l: New extension.

include/ChangeLog:

	* opcode/riscv-opc.h (CSR_MNSCRATCH): New csr.
	(CSR_MNEPC): Ditto.
	(CSR_MNCAUSE): Ditto.
	(CSR_MNSTATUS): Ditto.
	(DECLARE_CSR): New csr declarations.

2024-09-25 09:28:27 +08:00

..

aarch64.h

opcodes: aarch64: enforce checks on subclass flags in aarch64-gen.c

2024-07-18 20:54:14 -07:00

alpha.h

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2024-01-04 22:58:12 +10:30

arc-attrs.h

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arc-func.h

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2024-01-04 22:58:12 +10:30

arc.h

arc: Put DBNZ instruction to a separate class

2024-02-14 11:36:52 +01:00

arm.h

arm: remove disassembly support for the FPA co-processor

2024-06-05 17:45:45 +01:00

avr.h

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2024-01-04 22:58:12 +10:30

bfin.h

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2024-01-04 22:58:12 +10:30

bpf.h

bpf: there is no ldinddw nor ldabsdw instructions

2024-01-29 19:22:41 +01:00

cgen.h

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ChangeLog-0415

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ChangeLog-9103

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convex.h

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cr16.h

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cris.h

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crx.h

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csky.h

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d10v.h

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d30v.h

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dlx.h

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ft32.h

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h8300.h

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hppa.h

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i386.h

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ia64.h

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2024-01-04 22:58:12 +10:30

kvx.h

kvx: gas: rename: or -> ior, xor -> eor

2024-02-20 12:07:57 +01:00

loongarch.h

Add macros to get opcode of instructions approriately

2024-09-07 10:06:03 +08:00

m68hc11.h

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m68k.h

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metag.h

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mips.h

MIPS/opcodes: Rework documentation for instruction args

2024-09-15 13:27:33 +01:00

mmix.h

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mn10200.h

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mn10300.h

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moxie.h

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msp430-decode.h

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msp430.h

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nds32.h

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nfp.h

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nios2.h

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nios2r1.h

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nios2r2.h

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np1.h

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ns32k.h

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pdp11.h

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pj.h

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pn.h

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ppc.h

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pru.h

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pyr.h

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riscv-opc.h

RISC-V: Add Smrnmi extension csrs.

2024-09-25 09:28:27 +08:00

riscv.h

RISC-V: Add support for XCVsimd extension in CV32E40P

2024-09-03 12:02:28 +08:00

rl78.h

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2024-01-04 22:58:12 +10:30

rx.h

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s12z.h

Enable building the s12z target on Solaris hosts where REG_Y is defined in system header files.

2020-01-02 12:04:40 +00:00

s390.h

s390: Simplify (dis)assembly of insn operands with const bits

2024-09-12 15:06:06 +02:00

score-datadep.h

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score-inst.h

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sparc.h

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spu-insns.h

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spu.h

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tic4x.h

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tic6x-control-registers.h

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tic6x-insn-formats.h

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tic6x-opcode-table.h

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tic6x.h

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tic30.h

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tic54x.h

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tilegx.h

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tilepro.h

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v850.h

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vax.h

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visium.h

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wasm.h

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xgate.h

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