Szabolcs Nagy d74d4880e2 [AArch64] Add separate feature flag for weaker release consistent load insns ...

The weaker release consistency support of ARMv8.3-A is allowed as an optional
extension for ARMv8.2-A, so separate command line option and feature flag is
added: -march=armv8.2-a+rcpc turns LDAPR, LDAPRB, LDAPRH instructions on.

opcodes/
	* aarch64-tbl.h (RCPC, RCPC_INSN): Define.
	(aarch64_opcode_table): Use RCPC_INSN.

include/
	* opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
	(AARCH64_ARCH_V8_3): Update.

gas/
	* config/tc-aarch64.c (aarch64_features): Add rcpc.
	* doc/c-aarch64.texi (AArch64 Extensions): Document rcpc.
	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ...
	* testsuite/gas/aarch64/ldst-rcpc.d: This.
	* testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ...
	* testsuite/gas/aarch64/ldst-rcpc.s: This.
	* testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.

2017-01-04 12:31:08 +00:00

..

aarch64.h

[AArch64] Add separate feature flag for weaker release consistent load insns

2017-01-04 12:31:08 +00:00

alpha.h

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arc-func.h

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arc.h

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arm.h

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avr.h

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bfin.h

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cgen.h

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ChangeLog-0415

binutils ChangeLog rotation

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ChangeLog-9103

Add copyright notices

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convex.h

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cr16.h

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pn.h

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ppc.h

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pyr.h

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riscv-opc.h

Add support for the Q extension to the RISCV ISA.

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riscv.h

Add support for the Q extension to the RISCV ISA.

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rl78.h

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rx.h

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s390.h

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score-datadep.h

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score-inst.h

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sparc.h

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spu-insns.h

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tahoe.h

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tic4x.h

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tic6x-control-registers.h

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tic6x-insn-formats.h

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tic6x-opcode-table.h

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tic6x.h

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