mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-12-19 01:19:41 +08:00
ccb388ca39
Spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html Contributors: Mary Bennett <mary.bennett@embecosm.com> Nandni Jamnadas <nandni.jamnadas@embecosm.com> Pietra Ferreira <pietra.ferreira@embecosm.com> Charlie Keaney Jessica Mills Craig Blackmore <craig.blackmore@embecosm.com> Simon Cook <simon.cook@embecosm.com> Jeremy Bennett <jeremy.bennett@embecosm.com> Helene Chelin <helene.chelin@embecosm.com> bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Added `xcvmac` instruction class. (riscv_multi_subset_supports_ext): Likewise. gas/ChangeLog: * config/tc-riscv.c (validate_riscv_insn): Added the necessary operands for the extension. (riscv_ip): Likewise. * doc/c-riscv.texi: Noted XCVmac as an additional ISA extension for CORE-V. * testsuite/gas/riscv/cv-mac-fail-march.d: New test. * testsuite/gas/riscv/cv-mac-fail-march.l: New test. * testsuite/gas/riscv/cv-mac-fail-march.s: New test. * testsuite/gas/riscv/cv-mac-fail-operand.d: New test. * testsuite/gas/riscv/cv-mac-fail-operand.l: New test. * testsuite/gas/riscv/cv-mac-fail-operand.s: New test. * testsuite/gas/riscv/cv-mac-insns.d: New test. * testsuite/gas/riscv/cv-mac-insns.s: New test. opcodes/ChangeLog: * riscv-dis.c (print_insn_args): Disassemble information with the EXTRACT macro implemented. * riscv-opc.c: Defined the MASK and added XCVmac instructions. include/ChangeLog: * opcode/riscv-opc.h: Added corresponding MATCH and MASK macros for XCVmac. * opcode/riscv.h: Added corresponding EXTRACT and ENCODE macros for uimm. (enum riscv_insn_class): Added the XCVmac instruction class.