Andrew Cagney 2f2e6c5d5b Extend xor-endian and per-cpu support in core module. ...

Allow negated test when watching value within core.

1997-05-27 06:48:20 +00:00

..

arm

Makefile.orig, README.orig deleted.

1997-05-06 21:21:53 +00:00

common

Extend xor-endian and per-cpu support in core module.

1997-05-27 06:48:20 +00:00

d10v

* interp.c (sim_open): Undo patch to add -E support.

1997-04-22 17:31:11 +00:00

erc32

* interf.c (sim_open): Undo patch to add -E support.

1997-04-22 18:05:31 +00:00

h8300

* tconfig.in (SIM_PRE_LOAD): Delete, no longer used.

1997-04-30 17:22:51 +00:00

igen

Extend xor-endian and per-cpu support in core module.

1997-05-27 06:48:20 +00:00

m32r

Watchpoint interface.

1997-05-21 06:54:13 +00:00

mips

Extend xor-endian and per-cpu support in core module.

1997-05-27 06:48:20 +00:00

mn10300

* interp.c (sim_resume): Add missing case in big switch

1997-05-22 05:28:34 +00:00

ppc

Part II of adding callback argument to sim_open(). Update all the

1997-05-20 01:57:43 +00:00

sh

* tconfig.in: New file.

1997-04-24 00:56:33 +00:00

testsuite

Add flakey floating-point support to the TI c80 simulator.

1997-05-05 12:46:25 +00:00

tic80

Extend xor-endian and per-cpu support in core module.

1997-05-27 06:48:20 +00:00

v850

* interp.c (prog_bfd_was_opened_p): New static local.

1997-04-24 00:22:10 +00:00

w65

Part II of adding callback argument to sim_open(). Update all the

1997-05-20 01:57:43 +00:00

.Sanitize

Only zap the igen directory once.

1997-05-06 23:24:03 +00:00

ChangeLog

* Makefile.in (autoconf-common, autoconf-changelog): Change $* to $@.

1997-04-24 07:48:47 +00:00

configure

TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.

1997-04-22 17:46:07 +00:00

configure.in

* configure.in (m32r-*-*): New target.

1997-04-24 07:54:06 +00:00

Makefile.in

TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.

1997-04-22 17:46:07 +00:00

README-HACKING

Add autoheader counterpart to autoconf-common et.al.

1997-04-03 02:22:52 +00:00