168 Commits

Author SHA1 Message Date
7c5d88c1bb * interp.c (DECLARE_OPTION_HANDLER): Use it.
(mips_option_handler): New argument `cpu'.
	(sim_open): Update call to sim_add_option_table.
1998-02-28 02:43:31 +00:00
ce4713dc3b Make it compile again for -DTARGET_SKY 1998-02-23 23:40:40 +00:00
a48e8c8d21 sim-main.h: Re-arange r5900 registers so that they have their own
little struct.
interp.c: Update.  Also add floating point Max/Min functions.
mips.igen: Remove r5900 tag from any floating point instructions.
r5900.igen: Rewrite.  Implement *all* floating point insns (except ld/st).
r5400.igen: Tag mdmx functions as being mdmx specific.
1998-02-23 16:55:38 +00:00
f319bab251 * interp.c (load_memory): Add missing "break"'s. 1998-02-19 15:24:10 +00:00
7aa6042f58 configure: rerun autoconf
interp.c: shield dummy vu registers with -DTARGET_SKY
1998-02-16 04:33:28 +00:00
97908603a4 configure.in: add -DTARGET_SKY for mips64r5900-sky-elf configure.
sim-main.h: Define regs for sky if -DTARGET_SKY
interp.c: Initial register upload/download support for sky.
1998-02-15 21:33:13 +00:00
2c88fae9ad * Add hardware_init hook. 1998-02-09 23:53:33 +00:00
37379a256b IGEN - Replace IMEM (IMEM_IMMED) macro with IMEM<insn-size> macro,
update v850, tic80 and mips simulators.
IGEN - Prepend prefix to more generated symbols and macros
(idecode_issue, instruction_word).
IGEN - Add -Wnowith option to supress warnings about word size
inflicts in input files.
MIPS - Clean up Makefile.in, m16.igen, m16.dc (new), m16run.c (new) so
that a mips16 simulator built using IGEN can be compiled.
1998-02-03 05:39:15 +00:00
a97f304b04 Add support for configuring the size of the floating point unit (fp_word).
For mips, move fp_registers into a separate array of type fp_word[].
1998-02-02 14:06:52 +00:00
2acd126a47 Rewrite the mipsI/II/III pending-slot code. 1998-02-02 13:49:17 +00:00
192ae475f9 Always compile FP code (test for FP at run-time).
Remove dependance of interp.c on gencode.c's output.
1998-02-02 08:25:33 +00:00
01737f42d8 mips: Add multi-processor support for r5900. Others might work.
common, igen: Fix MP related bugs.
1998-02-01 03:29:48 +00:00
9ec6741b17 igen: Fix SMP simulator generator support.
Use the bfd-processor name in the sim-engine switch.
	Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
	Update
mips:	Fill in bfd-processor field of model records so that
	they match ../bfd/archures.
1998-01-31 06:23:41 +00:00
e0e0fc765e * interp.c (sim_monitor): Handle Densan monitor outbyte
and inbyte functions.
1998-01-05 23:43:30 +00:00
76ef416550 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c). 1997-12-29 16:03:23 +00:00
232156dee9 o Add SIM_SIGFPE to sim-signals
o Start SIM_SIG* at 64 so that the use of host signal numbers can be
  detected and reported.
o Update MIPS simulator to use sim-signal.
1997-11-20 09:50:36 +00:00
a09a30d298 Allow reads/writes to C0_CONFIG register. 1997-11-20 09:17:06 +00:00
030843d7f8 Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
1997-11-11 07:50:13 +00:00
95469cebdd Replace global IPC with function argument cia or current instruction
address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
1997-11-06 14:24:57 +00:00
7ce8b9178c IGEN likes to cache the current instruction address (CIA). Change the
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
1997-11-06 09:16:16 +00:00
63be8febf7 Rewrite the MIPS simulator's memory model so that it uses the generic
common/sim-core.

Add support for 3, 5, 6, 7 byte transfers to sim core.
1997-11-05 08:17:26 +00:00
22de994d0e Delete -l and -n options, didn't do anything.
Rename option trace to dinero-trace & dinero-file - -t clashed with
common options.
Enable common trace options.
1997-11-05 01:08:12 +00:00
525d929e49 Rewrite sim_monitor (implements read, write, open, et.al. system
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write.  This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
1997-11-05 00:08:14 +00:00
0425cfb3af Correct r5900 sanitization. 1997-11-04 05:50:22 +00:00
16bd5d6e52 Separate r5900 specifoc and mips16 instructions.
Add support for this to configure (vr5400 target only)
1997-10-27 07:55:24 +00:00
dad6f1f326 Add function to fetch 32bit instructions
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
1997-10-24 06:43:51 +00:00
aa324b9b1e Output pc profile statistics once gathered. 1997-10-21 07:40:00 +00:00
e2f8ffb736 Delete profile support from MIPS simulator, use sim/common/sim-profile
module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
1997-10-21 03:41:21 +00:00
fb5a2a3e39 Make mips registers of type unsigned_word.
Ensure all references to MIPS registers use same type.
1997-10-20 06:28:53 +00:00
ea985d2472 Move register definitions and macros out of interp.c and into sim-main.h 1997-10-16 03:50:48 +00:00
284e759d1f Rename generated file engine.c to oengine.c. 1997-10-16 03:39:13 +00:00
0c2c5f6141 Move global MIPS simulator variables into sim_cpu struct. 1997-10-14 09:26:03 +00:00
18c64df613 o Add support for configuring wordsize, fp hardware and target
endianness.  Provide defaults for some tier-1 mips targets.
o	Parameterize all functions with SIM_DESC.
1997-10-14 07:27:31 +00:00
6eedf3f4e5 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB. 1997-09-26 20:56:55 +00:00
9cb8397f86 * sim/mips/interp.c: Correct some HASFPU problems. 1997-09-16 15:36:18 +00:00
11ac69e013 Short form of sample-size option had wrong value. 1997-09-12 02:29:04 +00:00
972f3a34f5 mips/sim_info was just returning????? 1997-09-10 23:50:32 +00:00
9eeaaefa0f Better word error messages. 1997-09-09 10:38:39 +00:00
fafce69ab1 Add ABFD argument to sim_create_inferior. Document.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
1997-08-27 04:44:41 +00:00
7230ff0faa Flush defunct sim_kill. 1997-08-26 02:05:18 +00:00
247fccdeb5 Add ABFD argument to sim_open call. Pass through to sim_config so
that image properties such as endianness can be checked.

More strongly document the expected behavour of each of the sim_*
interfaces.

Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN.  Use in sim_config.
1997-08-25 23:14:25 +00:00
05d1322f2c * interp.c (sim_engine_run): Reset the ZERO register to zero
regardless of FEATURE_WARN_ZERO.
1997-07-02 18:13:00 +00:00
56e7c84918 o Fixes to repeated watchpoints
o	Add mips ISA instructions needed to handle interrupts
1997-06-03 23:03:50 +00:00
2f2e6c5d5b Extend xor-endian and per-cpu support in core module.
Allow negated test when watching value within core.
1997-05-27 06:48:20 +00:00
d3d2a9f718 ifdef out uses of simSTOP, simSTEP and simBE when DEBUG is defined. 1997-05-22 13:30:01 +00:00
50a2a69182 Watchpoint interface. 1997-05-21 06:54:13 +00:00
2e61a3ad9c Graft sim/common event and other code onto the mips simulator. 1997-05-19 13:30:30 +00:00
9d52bcb7f0 * Makefile.in (SIM_OBJS): Add sim-load.o.
* interp.c: #include bfd.h.
	(target_byte_order): Delete.
	(sim_kind, myname, big_endian_p): New static locals.
	(sim_open): Set sim_kind, myname.  Move call to set_endianness to
	after argument parsing.  Recognize -E arg, set endianness accordingly.
	(sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
	load file into simulator.  Set PC from bfd.
	(sim_create_inferior): Return SIM_RC.  Delete arg start_address.
	(set_endianness): Use big_endian_p instead of target_byte_order.
1997-04-17 10:23:48 +00:00
87e43259f1 Cleanups to compile under FreeBSD 1997-04-17 06:05:19 +00:00
53b9417eb3 * interp.c (sim_open): New SIM_DESC result. Argument is now
in argv form.
	(other sim_*): New SIM_DESC argument.
1997-03-13 20:55:26 +00:00