90 Commits

Author SHA1 Message Date
c44df9148d sim: sh: switch to new target-newlib-syscall
Use the new target-newlib-syscall module.  This is needed to merge all
the architectures into a single build, and sh has a custom syscall
table for its newlib/libgloss port.
2021-11-28 13:23:58 -05:00
e8f20a28b1 sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.
2021-11-15 02:53:29 -05:00
35f7d33dd9 sim: sh: fix switch-bool warnings
This code triggers -Werror=switch-bool warnings with <=gcc-5 versions.
Rework it to use if statements instead as it also simplifies a bit.
2021-11-13 00:57:00 -05:00
81817dacd6 sim: sh: fix conversion of PC to an integer
On LLP64 targets where sizeof(long) != sizeof(void*), this code fails:
sim/sh/interp.c:704:24: error: cast from pointer to integer of different size  -Werror=pointer-to-int-cast]
  704 |   do { memstalls += ((((long) PC & 3) != 0) ? (n) : ((n) - 1)); } while (0)
      |                        ^

Since this code simply needs to check alignment, cast it using uintptr_t
which is the right type for this.
2021-11-06 21:09:08 -04:00
a11cd3ddb2 sim: sh: clean up time(NULL) call
Casting 0 to a pointer via (long *) doesn't work on LLP64 targets:
error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]

It's also unnecessary here.  We can simply pass NULL like every other
bit of code does.
2021-11-06 21:06:47 -04:00
4a0bb487b8 sim: sh: break utime logic out of _WIN32 check
Some _WIN32 targets provide utime (like mingw), so move the header
include out from _WIN32 and under the specific HAVE_UTIME_H check.
2021-11-06 21:03:01 -04:00
73eef3fc38 sim: sh: drop errno extern
This isn't needed on any reasonable target nowadays, and no other
source does this, and breaks with some mingw targets, so punt the
extern entirely.
2021-11-06 20:59:17 -04:00
697fa6fe67 sim: sh: fix isnan redefinition with mingw targets
The code assumes that all _WIN32 targets are the same and can
define isnan to _isnan.  For mingw targets, they provide an isnan
define already, so no need for the fallback here.
2021-11-06 20:57:32 -04:00
6b015f8977 sim: sh: fix various parentheses warnings
Add parentheses to a bunch of places where the compiler suggests we
do to avoid confusion to most readers.
2021-11-06 20:32:31 -04:00
74bbe64132 sim: sh: rework register layout with anonymous unions & structs
Now that we require C11, we can leverage anonymous unions & structs
to fix a long standing issue with the SH register layout.  The use
of sregs.i for sh-dsp has generated a lot of compiler warnings about
the access being out of bounds -- it only has 7 elements declared,
but code goes beyond that to reach into the fregs that follow.  But
now that we have anonymous unions, we can reduce the nested names
and have sregs cover all of these registers.
2021-11-06 20:32:31 -04:00
ba307cddcf sim: overhaul alignment settings management
Currently, the sim-config module will abort if alignment settings
haven't been specified by the port's configure.ac.  This is a bit
weird when we've allowed SIM_AC_OPTION_ALIGNMENT to seem like it's
optional to use.  Thus everyone invokes it.

There are 4 alignment settings, but really only 2 matters: strict
and nonstrict.  The "mixed" setting is just the default ("unset"),
and "forced" isn't used directly by anyone (it's available as a
runtime option for some ports).

The m4 macro has 2 args: the "wire" settings (which represents the
hardwired port behavior), and the default settings (which are used
if nothing else is specified).  If none are specified, then the
build won't work (see above as if SIM_AC_OPTION_ALIGNMENT wasn't
called).  If default settings are provided, then that is used, but
we allow the user to override at runtime.  Otherwise, the "wire"
settings are used and user runtime options to change are ignored.

Most ports specify a default, or set the "wire" to nonstrict.  A
few set "wire" to strict, but it's not clear that's necessary as
it doesn't make the code behavior, by default, any different.  It
might make things a little faster, but we should provide the user
the choice of the compromises to make: force a specific mode at
compile time for faster runtime, or allow the choice at runtime.
More likely it seems like an oversight when these ports were
initially created, and/or copied & pasted from existing ports.

With all that backstory, let's get to what this commit does.

First kill off the idea of a compile-time default alignment and
set it to nonstrict in the common code.  For any ports that want
strict alignment by default, that code is moved to sim_open while
initializing the sim.  That means WITH_DEFAULT_ALIGNMENT can be
completely removed.

Moving the default alignment to the runtime also allows removal
of setting the "wire" settings at configure time.  Which allows
removing of all arguments to SIM_AC_OPTION_ALIGNMENT and moving
that call to common code.

The macro logic can be reworked to not pass WITH_ALIGNMENT as -D
CPPFLAG and instead move it to config.h.

All of these taken together mean we can hoist the macro up to the
top level and share it among all sims so behavior is consistent
among all the ports.
2021-06-12 21:14:50 -04:00
cd7caae651 sim: sh: fix a few compiler warnings 2021-05-29 13:06:26 -04:00
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
df68e12b3b sim: create header namespace
The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it.  So
create a new sim/ namespace and move the headers there.
2021-05-14 00:41:05 -04:00
19f6a43c6c Do not check for sys/time.h or sys/times.h
This updates the sim so that it unconditionally uses sys/time.h.  This
is in agreement with existing code, and a recent change to BFD.

I also think that sys/times.h is never needed by the sim, so this
patch removes the check and the one spot that was conditionally
including it.

sim/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* m4/sim_ac_common.m4 (SIM_AC_COMMON): Don't check for sys/time.h
	or sys/times.h.

sim/aarch64/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/arm/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/avr/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/bfin/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/bpf/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/common/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* sim-utils.c: Update includes.

sim/cr16/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* simops.c: Update includes.
	* configure, config.in: Rebuild.

sim/cris/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* rvdummy.c: Update includes.
	* dv-rv.c: Update includes.
	* configure, config.in: Rebuild.

sim/d10v/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/erc32/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/example-synacor/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/frv/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/ft32/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/h8300/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/iq2000/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/lm32/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/m32c/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/m32r/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/m68hc11/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/mcore/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/microblaze/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/mips/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/mn10300/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/moxie/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/msp430/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/or1k/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/ppc/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* mon.c: Update includes.
	* emul_unix.c: Update includes.
	(do_unix_gettimeofday): Update condition.

sim/pru/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/riscv/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/rl78/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/rx/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.

sim/sh/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* interp.c: Update includes.
	* configure, config.in: Rebuild.

sim/v850/ChangeLog
2021-04-22  Tom Tromey  <tom@tromey.com>

	* configure, config.in: Rebuild.
2021-04-22 19:51:55 -06:00
b7c5246bbf sim: sh: switch syscalls to common nltvals
Rather than hand duplicate the syscall table, switch to the common
nltvals framework.  We have to tweak the constant names, but we get
everything else for free.  I made sure the constants have the same
values before & after too :).
2021-04-18 23:03:08 -04:00
d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
2021-04-12 00:14:32 -04:00
68ed285428 sim: clean up C11 header includes
Since we require C11 now, we can assume many headers exist, and
clean up all of the conditional includes.  It's not like any of
this code actually accounted for the headers not existing, just
whether we could include them.

The strings.h cleanup is a little nuanced: it isn't in C11, but
every use of it in the codebase will include strings.h only if
string.h doesn't exist.  Since we now assume the C11 string.h
exists, we'll never include strings.h, so we can delete it.
2021-01-11 08:05:54 -05:00
13a590ca65 sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations 2017-02-13 01:26:21 -05:00
93e6fe04cc Fix primary reason why the SH simulation hasn't been working on 64 bit hosts.
sim/sh/
	* interp.c (dmul): Split into dmul_s and dmul_u.  Use explicit integer
	width types and simplify implementation.
	* gencode.c (dmuls.l, dmulu.l): Use new functions dmul_s and dmul_u.
2016-04-10 11:02:47 +09:00
417a667c4a Adjust default memory size and stack base address for SH simulator.
ld/ChangeLog:
	* sh/interp.c (sim_memory_size): Default init to 30.
	(parse_and_set_memory_size): Adjust upper bound to 31.

sim/ChangeLog:
	* sh/interp.c (sim_memory_size): Default init to 30.
	(parse_and_set_memory_size): Adjust upper bound to 31.
2016-04-09 10:24:00 +09:00
2e3d4f4d5d sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly
2016-01-03  Mike Frysinger  <vapier@gentoo.org>

	* sim-options.c (sim_parse_args): Mark argv array const.
	* sim-options.h (sim_parse_args): Likewise.
2016-01-06 21:48:59 -05:00
77cf2ef5dc sim: parse_args: display getopt error ourselves
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed.  Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
2016-01-03 22:07:39 -05:00
34fed69938 sim: use libiberty countargv in more places
A bunch of places open code the countargv implementation, or outright
duplicate it (as count_argc).  Replace all of those w/countargv.
2016-01-03 04:08:56 -05:00
0cb8d8513c sim: drop host endian configure option
The --enable-sim-hostendian flag was purely so people had an escape route
for when cross-compiling.  This is because historically, AC_C_BIGENDIAN
did not work in those cases.  That was fixed a while ago though, so we can
require that macro everywhere now and simplify a good bit of code.
2016-01-03 00:52:51 -05:00
1ac72f0659 sim: convert to bfd_endian
Rather than re-invent endian defines, as well as maintain our own list
of OS & arch-specific includes, punt all that logic in favor of the bfd
ones already set up and maintained elsewhere.  We already rely on the
bfd library, so leveraging the endian aspect should be fine.
2016-01-03 00:18:07 -05:00
e1211e5506 sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to common sim_{fetch,store}_register 2015-12-30 03:30:25 -05:00
6cc9885631 sim: sh: delete global callback/argv
We can use the sim state everywhere now to get these values on the fly.
2015-11-22 00:53:23 -05:00
6e4f085c7f sim: sim-close: unify sim_close logic
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did.  Now we have a single module that takes care of
all the logic for us.

Most of the non-cgen based ones could be deleted outright.  The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.

We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
2015-11-15 02:30:19 -05:00
27b97b40bc sim: arm/cr16/d10v/h8300/microblaze/sh: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-17 02:22:16 -04:00
62454d3da2 sim: sh: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-28 17:45:31 -04:00
5fa71a1b13 sim: sh: clean up some warnings
Mostly converting old style prototypes.  Also include a few missing
headers, and add static/casts where appropriate.
2015-03-28 17:45:31 -04:00
60d847df0b sim: constify arg to sim_do_command
It is rare for people to want to modify the cmd arg.  In general, they
really shouldn't be, but a few still do.  For those who misbehave, dupe
the string locally so they can bang on it.
2014-03-10 22:57:29 -04:00
b2b255bdf3 sim: constify prog_name
There's no need for the prog_name handed down to the core to be mutable,
so add const markings to it and all the related funcs.
2014-03-05 01:42:44 -05:00
ef3e8cf7d1 sim: delete duplicate SIGINT handling
Many of the simulators change the SIGINT handler.
E.g., moxie/interp.c:

  sigsave = signal (SIGINT, interrupt);

However, this is unnecessary.
remote-sim.h already provides an API for asynchronously stopping
a sim; and both gdb and the drivers (run.c and nrun.c at least,
I didn't check the others) install a SIGINT handler which
calls this method.

URL: https://sourceware.org/bugzilla/show_bug.cgi?id=16450
Reported-by: Tom Tromey <tromey@redhat.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2014-02-17 18:32:45 -05:00
bdca5ee4bc remove PARAMS from sim
This removes the last uses of PARAMS from sim.

2014-01-06  Tom Tromey  <tromey@redhat.com>

	* README-HACKING: Don't use PARAMS.
	* arm/wrapper.c: Don't use PARAMS.
	* bfin/sim-main.h: Don't use PARAMS.
	* common/callback.c: Don't use PARAMS.
	* common/cgen-trace.c: Don't use PARAMS.
	* common/run-sim.h: Don't use PARAMS.
	* common/run.c: Don't use PARAMS.
	* common/sim-base.h: Don't use PARAMS.
	* common/sim-load.c: Don't use PARAMS.
	* common/sim-options.h: Don't use PARAMS.
	* common/sim-trace.c: Don't use PARAMS.
	* common/sim-trace.h: Don't use PARAMS.
	* common/sim-utils.h: Don't use PARAMS.
	* cr16/cr16_sim.h: Don't use PARAMS.
	* cr16/gencode.c: Don't use PARAMS.
	* cr16/interp.c: Don't use PARAMS.
	* cr16/simops.c: Don't use PARAMS.
	* d10v/d10v_sim.h: Don't use PARAMS.
	* d10v/gencode.c: Don't use PARAMS.
	* d10v/interp.c: Don't use PARAMS.
	* d10v/simops.c: Don't use PARAMS.
	* erc32/erc32.c: Don't use PARAMS.
	* erc32/exec.c: Don't use PARAMS.
	* erc32/float.c: Don't use PARAMS.
	* erc32/func.c: Don't use PARAMS.
	* erc32/sis.c: Don't use PARAMS.
	* erc32/sis.h: Don't use PARAMS.
	* mips/interp.c: Don't use PARAMS.
	* mips/sim-main.h: Don't use PARAMS.
	* sh/interp.c: Don't use PARAMS.
	* v850/sim-main.h: Don't use PARAMS.
	* v850/v850_sim.h: Don't use PARAMS.
2014-01-07 09:17:05 -07:00
3cb2ab1a46 gdb:
2013-03-15  Steve Ellcey  <sellcey@mips.com>

	* remote-sim.c (sim_command_completer): Make char arguments const.

include:


2013-03-15  Steve Ellcey  <sellcey@mips.com>

	* gdb/remote-sim.h (sim_command_completer): Make char arguments const.

sim:

2013-03-15  Steve Ellcey  <sellcey@mips.com>

	* arm/wrapper.c (sim_complete_command): Make char arguments const.
	* avr/interp.c (sim_complete_command): Ditto.
	* common/sim-options.c (sim_complete_command): Ditto.
	* cr16/interp.c (sim_complete_command): Ditto.
	* erc32/interf.c (sim_complete_command): Ditto.
	* m32c/gdb-if.c (sim_complete_command): Ditto.
	* microblaze/interp.c (sim_complete_command): Ditto.
	* ppc/sim_calls.c (sim_complete_command): Ditto.
	* rl78/gdb-if.c (sim_complete_command): Ditto.
	* rx/gdb-if.c (sim_complete_command): Ditto.
	* sh/interp.c (sim_complete_command): Ditto.
2013-03-15 17:53:44 +00:00
f95586a44d Update sim_fetch_register, sim_store_register for sh and mn10300.
Fix compile warnings for sh built on 64-bit hosts.
2012-02-16 23:17:27 +00:00
af9f7da78b sim: add sim_complete_command stubs for non-common-using ports
For the ports that don't use the common/ subdir, we need to add stub funcs
to them to avoid build failures with gdb and command completion.  These do
not implement the actual completion functionality ... any port that wants
that can either convert to the common/ subdir, or fill out the function on
their own time.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-16 18:16:36 +00:00
5558e7e691 sim: constify sim_write source buffer (part 2)
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code.  So constify them too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-14 07:38:06 +00:00
22e041e267 * interp.c: Don't include sysdep.h.
Include stdio.h and errno.h.
 	Include string.h strings.h stdlib.h sys/stat.h if present.
2010-02-14 07:15:57 +00:00
f3876f6909 2008-02-04 Antony King <antony.king@st.com>
* interp.c (macl): Fix non-portable implementation.
2008-02-04 17:26:07 +00:00
72a37d8dad 2005-11-10 Andrew Stubbs <andrew.stubbs@st.com>
* interp.c (sim_memory_size): Use same amount of memory on Windows as
	elsewhere.
2005-11-10 11:05:31 +00:00
6a8492b562 * interp.c (<sys/mman.h>): Include.
(mcalloc): New function / macro.
	(mfree): New macro.
	(sim_size): Use mcalloc and mfree.
2005-09-19 11:29:30 +00:00
63bee80353 * interp.c (strswaplen): Add one for '\0' delimiter. 2005-08-02 16:17:59 +00:00
ae0a84af70 * gencode.c (movua.l): Compensate for endianness.
* interp.c (RAISE_EXCEPTION_IF_IN_DELAY_SLOT): New macro.
	(in_delay_slot): New flag variable.
	(Delay_Slot): Set in_delay_slot.
	(sim_resume): Reset in_delay_slot after leaving code switch.
	* gencode.c (op tab): Call RAISE_EXCEPTION_IF_IN_DELAY_SLOT for all
	instructions not allowed in delay slots.

	Commited by Corinna Vinschen <vinschen@redhat.com>
	Introduce SH2a support.
	* interp.c: Change type of jump table to short.  Add various macros.
	(sim_load): Save the bfd machine code.
	(sim_create_inferior): Ditto.
	(union saved_state_type): Add tbr, ibnr and ibcr registers.
	Move bfd_mach to end of struct.  Add regstack pointer.
	(init_dsp): Don't swap contents of sh_dsp_table any more.  Instead
	use it directly in its own switch statement.  Allocate space for 512
	register banks.
	(do_long_move_insn): New function.
	(do_blog_insn): Ditto.
	(trap): Use trap #13 and trap #14 to set ibnr and ibcr.
	* gencode.c: Move movx/movy insns into separate switch statement.
	(op tab): Add sh2a insns.  Reject instructions that are disabled
	on that chip.
	(gensim_caselist): Generate default case here instead of in caller.
	(gensim): Generate two separate switch statements.  Call
	gensim_caselist once for each (for movsxy_tab and for tab).
	Add tokens for r15 and multiple regs.
	(conflict_warn, warn_conflicts): Add for debugging.
2004-09-08 09:11:50 +00:00
3e5117978b 2004-02-12 Michael Snyder <msnyder@redhat.com>
* gencode.c (table): Change from char to short.
	(dumptable): Change generated table from char to short.
	* interp.c (sh_jump_table, sh_dsp_table, ppi_table): char to short.
	(init_dsp): Compute size of sh_dsp_table.
	(sim_resume): Change jump_table from char to short.
2004-02-12 19:32:12 +00:00
87acb4a7d1 2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Whitespace	cleanup.
        * interp.c: Ditto.
2004-01-10 00:43:28 +00:00
86bc60ebf4 2004-01-07 Michael Snyder <msnyder@redhat.com>
* gencode.c: Replace 'Hitachi' with 'Renesas'.
        (op tab): Add new instructions for sh4a, DBR, SBR.
        (expand_opcode): Add handling for new movxy combinations.
        (gensym_caselist): Ditto.
        (expand_ppi_movxy): Remove movx/movy expansions,
        now handled in expand_opcode.
        (gensym): Add some helpful macros.
        (expand_ppi_code): Flatten loop for simplicity, tweak for 12-bit
        instead of 8-bit table (some insns are ambiguous to 8 bits).
	(ppi_gensim, main): Generate 12-bit instead of 8-bit ppi table.

	* interp.c: Replace 'Hitachi' with 'Renesas'.
        (union saved_state_type): Add dbr, sgr, ldst.
        (get_loop_bounds_ext): New function.
        (init_dsp): Add bfd_mach_sh4al_dsp.
	(sim_resume): Handle extended loop bounds.
2004-01-09 19:44:50 +00:00
794cd17b28 * interp.c (fsca_s, fsrra_s): New functions.
* gencode.c (tab): Add entries for fsca and fsrra.
	(expand_opcode): Allow variable length n / m fields.
2003-11-03 14:14:15 +00:00