Add a -z pack-relative-relocs option to enable DT_RELR and create a
relr.dyn section for DT_RELR. DT_RELR is implemented with the linker
relaxation infrastructure, but it doesn't require the --relax option
enabled. -z pack-relative-relocs implies -z combreloc. -z nocombreloc
implies -z nopack-relative-relocs.
-z pack-relative-relocs is chosen over the similar option in lld,
--pack-dyn-relocs=relr, to implement a glibc binary lockout mechanism
with a special glibc version symbol, to avoid random crashes of DT_RELR
binaries with the existing glibc binaries.
bfd/
* elf-bfd.h (elf_link_hash_table): Add srelrdyn.
* elflink.c (_bfd_elf_link_create_dynamic_sections): Create a
.relr.dyn section for DT_RELR.
include/
* bfdlink.h (bfd_link_info): Add enable_dt_relr.
ld/
* News: Mention -z pack-relative-relocs and
-z nopack-relative-relocs.
* ld.texi: Document -z pack-relative-relocs and
-z nopack-relative-relocs.
* ldelf.c (ldelf_after_parse): Disable DT_RELR if not building
PIE nor shared library. Add 3 spare dynamic tags for DT_RELR,
DT_RELRSZ and DT_RELRENT.
* ldlang.c (lang_relax_sections): Also enable relaxation if
DT_RELR is enabled.
* emulparams/elf32_x86_64.sh: Source dt-relr.sh.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
* emulparams/dt-relr.sh: New file.
* scripttempl/elf.sc: Support .relr.dyn.
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.
The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
The ".persistent" section is for data that should be initialized during
load, but not during application reset.
The ".noinit" section is for data that should not be initialized during
load or application reset.
Targets utilizing the elf.sc linker script template can define
HAVE_{NOINIT,PERSISTENT}=yes to include the .noinit or .persistent
output sections in the generated linker script.
Targets with existing support for .noinit did not handle unique
.noinit.* and .gnu.linkonce.n.* sections the .noinit output section,
this patch also fixes that.
bfd/ChangeLog:
* elf.c (special_sections_g): Add .gnu.linkonce.n and .gnu.linkonce.p.
(special_sections_n): Add .noinit.
(special_sections_p): Add .persistent.
binutils/ChangeLog:
* testsuite/lib/binutils-common.exp (supports_noinit_section): New.
(supports_persistent_section): New.
gas/ChangeLog:
* testsuite/gas/elf/elf.exp: Run new tests.
* testsuite/gas/elf/section25.d: New test.
* testsuite/gas/elf/section25.s: New test.
* testsuite/gas/elf/section26.d: New test.
* testsuite/gas/elf/section26.s: New test.
ld/ChangeLog:
* emulparams/armelf.sh (OTHER_SECTIONS): Remove .noinit section
definition.
Define HAVE_{NOINIT,PERSISTENT}=yes.
* scripttempl/avr.sc (.noinit): Add .noinit.* and .gnu.linkonce.n.*
input section wildcard patterns.
* scripttempl/elf.sc: Define .noinit and .persistent sections when
HAVE_NOINIT or HAVE_PERSISTENT are defined to "yes".
* scripttempl/elf32msp430.sc (.noinit): Add .noinit.* and
.gnu.linkonce.n.*. input section wildcard patterns.
(.persistent): Add .persistent.* and
.gnu.linkonce.p.*. input section wildcard patterns.
* scripttempl/elfarcv2.sc (.noinit): Add .noinit.* and
.gnu.linkonce.n.*. input section wildcard patterns.
* scripttempl/pru.sc: Likewise.
* testsuite/ld-elf/noinit-sections-1.d: New test.
* testsuite/ld-elf/noinit-sections-2.d: New test.
* testsuite/ld-elf/noinit-sections-2.l: New test.
* testsuite/ld-elf/noinit-sections.s: New test.
* testsuite/ld-elf/persistent-sections-1.d: New test.
* testsuite/ld-elf/persistent-sections-2.d: New test.
* testsuite/ld-elf/persistent-sections-2.l: New test.
* testsuite/ld-elf/persistent-sections.s: New test.
So, here's my suggestion for making _init .. __etext cover .text +
.rodata (including things like the read-only exception tables) for
elf64mmix. A quick web search gives that __etext (and friends) isn't
well defined, so each target can interpret the "end of text segment"
to their own liking. It seems likely this change is also a better fit
than the default for other ports, at least those with .rodata after
.text in the same segment.
The presence of a separate rodata-segment is optional (and not true
for elf64mmix). This is reflected in the name as SEPARATE_TEXT /
SEPARATE_CODE isn't considered, to keep it simple; each target has to
make sure their settings of variables make sense.
ld:
* scripttempl/elf.sc (ETEXT_LAST_IN_RODATA_SEGMENT): New variable.
* emulparams/elf64mmix.sh (ETEXT_LAST_IN_RODATA_SEGMENT): Define.
* testsuite/ld-mmix/sec-1.d: Adjust.
__rel[a]_iplt_start and __rel[a]_iplt_end are defined to handle IFUNC in
static executables. For PIE, since IFUNC is handled as the part of the
normal dynamic relocation processing, there is no need to define these
symbols in PIE.
* scripttempl/elf.sc (CREATE_PIC): New. Set for CREATE_SHLIB or
CREATE_PIE.
(__rel_iplt_start): Don't define for CREATE_PIC.
(__rel_iplt_end): Likewise.
(__rela_iplt_start): Likewise.
(__rela_iplt_end): Likewise.
For ld -r, we generally set the VMA of sections to zero. This is done
to make the output of ld -r most similar to that output by the
assembler, which generally has sections starting at VMA zero. In some
cases that covers for backend bugs which would mis-handle relocatable
object files with non-zero section VMAs.
This patch fixes a few sections that didn't have zero VMAs for ld -r.
A missing zero on .note.gnu.build-id and .eh_frame_hdr doesn't matter
much since these are linker generated symbols only output on final
link, but it's good to be consistent.
* Makefile.am (ei386beos.c, ei386go32.c): Correct dependencies.
* Makefile.in: Regenerate.
* scripttempl/elf.sc (.note.gnu.build-id, .eh_frame_hdr): Set
address with ${RELOCATING-0}.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/armbpabi.sc: Likewise.
* scripttempl/avr.sc: Likewise.
* scripttempl/elf64hppa.sc: Likewise.
* scripttempl/elf_chaos.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfxtensa.sc: Likewise.
* scripttempl/mep.sc: Likewise.
* scripttempl/nds32elf.sc: Likewise.
* scripttempl/pru.sc: Likewise.
* scripttempl/elf32msp430.sc: Likewise, and for other sections.
* scripttempl/epiphany_4x4.sc: Similarly.
gold * layout.cc (section_name_mapping): Add an entry for
.gnu.build.attributes.
ld * scripttempl/elf.sc: Place .gnu.build.attributes sections with
other read-only sections.
Define and handle TLS relocations for FDPIC in BFD and gas.
In gas, the new relocations are rejected if the --fdpic option was not
specified.
We also define the __tdata_start symbol to mark the start of the
.tdata section. This allows FDPIC static binaries to find the start of
.tdata section, since phdr->p_vaddr of TLS segment is not a valid
value for FDPIC.
2018-04-25 Christophe Lyon <christophe.lyon@st.com>
Mickaël Guêné <mickael.guene@st.com>
bfd/:
* bfd-in2.h (BFD_RELOC_ARM_TLS_GD32_FDPIC)
(BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC): New
relocations.
* elf32-arm.c (elf32_arm_howto_table_2): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC relocations.
(elf32_arm_reloc_map): Add R_ARM_TLS_GD32_FDPIC,
R_ARM_TLS_LDM32_FDPIC, R_ARM_TLS_IE32_FDPIC.
(struct elf32_arm_link_hash_table): Update comment.
(elf32_arm_final_link_relocate): Handle TLS FDPIC relocations.
(IS_ARM_TLS_RELOC): Likewise.
(elf32_arm_check_relocs): Likewise.
(allocate_dynrelocs_for_symbol): Likewise.
(elf32_arm_size_dynamic_sections): Update comment.
* reloc.c: Add BFD_RELOC_ARM_TLS_GD32_FDPIC,
BFD_RELOC_ARM_TLS_LDM32_FDPIC, BFD_RELOC_ARM_TLS_IE32_FDPIC.
gas/
* config/tc-arm.c (reloc_names): Add TLSGD_FDPIC, TLSLDM_FDPIC,
GOTTPOFF_FDIC relocations.
(md_apply_fix): Handle the new TLS FDPIC relocations.
(tc_gen_reloc): Likewise.
(arm_fix_adjustable): Likewise.
include/
* elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
R_ARM_TLS_IE32_FDPIC.
ld/
* scripttempl/elf.sc: Define __tdata_start for .tdata section.
The new "-z separate-code" option will generate separate code LOAD
segment which must be in wholly disjoint pages from any other data.
include/
PR ld/22393
* bfdlink.h (bfd_link_info): Add separate_code.
ld/
PR ld/22393
* NEWS: Mention "-z separate-code".
* emultempl/elf32.em (gld${EMULATION_NAME}_get_script): Get
builtin linker scripts and return linker scripts from disk for
"-z separate-code".
(gld${EMULATION_NAME}_handle_option): Handle "-z separate-code"
and "-z noseparate-code".
* genscripts.sh: Generate linker scripts for "-z separate-code".
(LD_FLAG): Set to *textonly for "-z separate-code".
* ld.texinfo: Document "-z separate-code".
* lexsup.c (elf_shlib_list_options): Add linker help messsages
for "-z separate-code" and "-z noseparate-code".
* scripttempl/elf.sc (SEPARATE_TEXT): New
(TEXT_SEGMENT_ALIGN): Likewise.
Use ${TEXT_SEGMENT_ALIGN} to align and pad text segment to
${MAXPAGESIZE}.
We must keep all PREINIT_ARRAY, INIT_ARRAY as well as FINI_ARRAY sections
for ld -r --gc-sections.
bfd/
PR ld/22677
* elflink.c (bfd_elf_gc_sections): Keep all PREINIT_ARRAY,
INIT_ARRAY as well as FINI_ARRAY sections for ld -r --gc-sections.
ld/
PR ld/22677
* scripttempl/elf.sc (PREINIT_ARRAY): New.
Don't add .preinit_array for ld -r.
* testsuite/ld-elf/pr22677.d: New file.
* testsuite/ld-elf/pr22677.s: Likewise.
elf.sc has
if test -n "${RODATA_ADDR}"; then
RODATA_ADDR="\
SEGMENT_START(\"rodata-segment\", ${RODATA_ADDR}) + SIZEOF_HEADERS"
else
RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
^^^^^^^^^^ Set RODATA_ADDR
RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${RODATA_ADDR})"
^^^^^^^^^^ Set RODATA_ADDR with ${RODATA_ADDR}
fi
if test -n "${SHLIB_RODATA_ADDR}"; then
SHLIB_RODATA_ADDR="\
SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR}) + SIZEOF_HEADERS"
else
SHLIB_RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR})"
^^^^^^^^^^ Set SHLIB_RODATA_ADDR
SHLIB_RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
^^^^^^^^^^ Override SHLIB_RODATA_ADDR
fi
The order should be:
if test -n "${SHLIB_RODATA_ADDR}"; then
SHLIB_RODATA_ADDR="\
SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR}) + SIZEOF_HEADERS"
else
SHLIB_RODATA_ADDR="ALIGN(${SEGMENT_SIZE}) + (. & (${MAXPAGESIZE} - 1))"
SHLIB_RODATA_ADDR="SEGMENT_START(\"rodata-segment\", ${SHLIB_RODATA_ADDR})"
fi
PR ld/22696
* scripttempl/elf.sc: Fix the order of SHLIB_RODATA_ADDR.
OTHER_PLT_SECTIONS contains sections which should be placed right after
.plt section.
* emulparams/elf32_x86_64.sh (TINY_READONLY_SECTION): Renamed
to ...
(OTHER_PLT_SECTIONS): This.
* emulparams/elf_i386.sh: Likewise.
* emulparams/elf_iamcu.sh: Likewise.
* emulparams/elf_x86_64.sh: Likewise.
* scripttempl/elf.sc: Place ${OTHER_PLT_SECTIONS} just after
.plt.
The only target that renames .bss is tic6x, turning .bss into .far,
and .sbss into .bss. .dynbss is not renamed to .dynfar by BFD.
* scripttempl/elf.sc: Don't use $BSS_NAME in .dynbss.
Reverts a2c59f28 and e474ab13. Since the unary form of ALIGN only
references "dot" implicitly, there isn't really a strong argument for
making ALIGN use a relative value when inside an output section.
* ldexp.c (align_dot_val): Delete.
(fold_unary <ALIGN_K, NEXT>): Revert 2015-07-10 change.
(is_align_conditional): Revert 2015-07-20 change.
(exp_fold_tree_1): Likewise, but keep expanded comment.
* scripttempl/elf.sc (.ldata, .bss): Revert 2015-07-20 change.
* ld.texinfo (<ALIGN>): Correct description.
More fallout from a2c59f28. This one could have been fixed by simply
using ". = ALIGN (ABSOLUTE (.), 2);" but it's nicer to align the
section.
* emulparams/criself.sh (INIT_ADDR, FINI_ADDR): Define.
(INIT_START, FINI_START): Don't ALIGN.
* scriptempl/elf.sc (.init, .fini): Apply INIT_ADDR/FINI_ADDR.
a2c59f28 changed the way the unary ALIGN behaved inside output sections,
resulting in cris-elf testsuite regressions. This patch pads out .bss
in the same manner as it was prior to the ALIGN change.
* scripttempl/elf.sc (.ldata, .bss): Align absolute value of dot.
* ldexp.c (is_align_conditional): Handle binary ALIGN.
(exp_fold_tree_1): Move code setting SEC_KEEP for assignments to
dot inside output sections. Handle absolute expressions.
Adjusting the start of the relro segment in order to make it end
exactly on a page boundary runs into difficulties when sections in the
relro segment are aligned; Adjusting the start by (next_page - end)
sometimes results in more than that adjustment occurring at the end,
overrunning the page boundary. So when that occurs we try a new lower
start position by masking the adjusted start with the maximum section
alignment. However, we didn't consider that this masked start address
may in fact be before the initial relro base, which is silly since
that can only increase padding at the relro end.
I've also moved some calculations closer to where they are used, and
comments closer to the relevant statements.
* ldlang.c (lang_size_sections): When alignment of sections
results in relro base adjustment being too large, don't go lower
than the initial value.
* ldexp.c (fold_binary <DATA_SEGMENT_RELRO_END>): Comment.
* scripttempl/elf.sc (DATA_SEGMENT_ALIGN): Omit SEGMENT_SIZE
alignment when SEGMENT_SIZE is the same as MAXPAGESIZE.
.toc1 is the second level TOC section used by gcc's -mminimal-toc. It
too should be read-only after relocation. Also, the last patch
description mentioned .sbss moving but didn't actually do that, so fix
that problem. .tocbss (whatever that is) was before .sbss previously,
so move that one too.
* emulparams/elf64ppc.sh (OTHER_SDATA_SECTIONS): Use in place of..
(OTHER_BSS_SYMBOLS): ..this.
(OTHER_PLT_RELOC_SECTIONS): Don't define.
(OTHER_GOT_RELOC_SECTIONS): Add rela.toc1 and rela.tocbss.
(OTHER_READWRITE_SECTIONS): Don't define. Move .toc1 to..
(OTHER_RELRO_SECTIONS_2): ..here.
* scripttempl/elf.sc: Move SBSS too when DATA_SDATA.
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
More sections can be read-only after relocation. .opd is an obvious
candidate.
* emulparams/elf64ppc.sh (OTHER_READWRITE_SECTIONS): Move .opd to..
(OTHER_RELRO_SECTIONS_2): ..here, new define.
* scripttempl/elf.sc: Add OTHER_RELRO_SECTIONS_2.
and fix more nds32 dependencies.
* scripttempl/elf.sc: Edit out __rela_iplt symbol assignments from
.rel sections, and __rel_iplt from .rela sections.
* scripttempl/nds32elf.sc: Likewise.
* Makefile.am (ends32*.c): Depend on nds32elf.sc.
* Makefile.in: Regenerate.
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
