* resolve.cc (Symbol::override_base): Don't override st_type
from plugin placeholder symbols.
(Symbol_table::resolve): Likewise.
(Symbol_table::should_override): Don't complain about TLS mismatch
if the TO symbol is a plugin placeholder.
* testsuite/Makefile.am (plugin_test_tls): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/plugin_test_tls.sh: New test script.
* testsuite/two_file_test_2_tls.cc: New test source.
* testsuite/two_file_test_tls.cc: New test source.
* elf64-aarch64.c (elf64_aarch64_final_link_relocate): Call
aarch64_resolve_relocation and bfd_elf_aarch64_put_addend to
handle the relocations of R_AARCH64_JUMP26, R_AARCH64_CALL26,
R_AARCH64_LD64_GOT_LO12_NC, R_AARCH64_ADR_GOT_PAGE and
R_AARCH64_GOT_LD_PREL19.
ld/testsuite/
* ld-aarch64/aarch64-elf.exp: Add 'ifunc-7c'.
* ld-aarch64/ifunc-7c.d: New test.
* elf32-arm.c (allocate_dynrelocs_for_symbol): Transform
ST_BRANCH_TO_ARM into ST_BRANCH_TO_THUMB if the target only
supports thumb instructions.
PR ld/15302
* ld-arm/branch-lks-sym.ld: New script.
* ld-arm/thumb-b-lks-sym.s: New test.
* ld-arm/thumb-b-lks-sym.d: Expected disassembly.
* ld-arm/thumb-bl-lks-sym.s: New test.
* ld-arm/thumb-bl-lks-sym.d: Expected disassembly.
* ld-arm/arm-elf.exp: Run the new tests.
* config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
* config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
function. Generates an error if the adjusted offset is out of a
16-bit range.
gas/
* config/tc-nios2.c (md_apply_fix): Mask constant
BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
gas/testsuite/
* gas/nios2/movia.s: Add additional test case with negative
constant value.
* gas/nios2/movia.d: Likewise.
This fixes the regressions reported at
<http://sourceware.org/ml/gdb-patches/2013-06/msg00280.html>:
$ runtest-gdbserver gdb.base/siginfo-obj.exp gdb.base/siginfo-thread.exp gdb.threads/siginfo-threads.exp
Running ./gdb.base/siginfo-thread.exp ...
FAIL: gdb.base/siginfo-thread.exp: p ssi_addr
Running ./gdb.threads/siginfo-threads.exp ...
FAIL: gdb.threads/siginfo-threads.exp: signal 0 si_pid
FAIL: gdb.threads/siginfo-threads.exp: signal 1 si_pid
FAIL: gdb.threads/siginfo-threads.exp: signal 2 si_pid
FAIL: gdb.threads/siginfo-threads.exp: signal 3 si_pid
Running ./gdb.base/siginfo-obj.exp ...
FAIL: gdb.base/siginfo-obj.exp: p ssi_addr
FAIL: gdb.base/siginfo-obj.exp: p ssi_addr
The multi-arch patch made GDBserver do the the wrong siginfo layout
conversion, because most uses of `linux_is_elf64' were removed, and it
ended up never set. A global really is the wrong thing to use as
elf64-ness is a per-process property; `linux_is_elf64' was just
accidentally left behind.
Tested on x86_64 Fedora 17.
gdb/gdbserver/
2013-06-12 Pedro Alves <palves@redhat.com>
* linux-x86-low.c (linux_is_elf64): Delete global.
(x86_siginfo_fixup): Replace reference to `linux_is_elf64' global
with local linux_pid_exe_is_elf_64_file use.
There's no need for every arch to pre-allocate disabled_regsets.
Chances are the array won't be used.
(I have a hunch that with some more work we could dispense with
initialize_regsets_info.)
Tested on x86_64 Fedora 17 w/ -lmcheck.
gdb/gdbserver/
2013-06-11 Pedro Alves <palves@redhat.com>
* linux-low.c (regset_disabled, disable_regset): New functions.
(regsets_fetch_inferior_registers)
(regsets_store_inferior_registers): Use them.
(initialize_regsets_info); Don't allocate the disabled_regsets
array here.
* linux-low.h (struct regsets_info) <disabled_regsets>: Extend
comment.
This fixes the regression reported at
<http://sourceware.org/ml/gdb-patches/2013-06/msg00185.html>.
GDBserver was reaching:
static int
regsets_fetch_inferior_registers (struct regsets_info *regsets_info,
struct regcache *regcache)
{
struct regset_info *regset;
int saw_general_regs = 0;
int pid;
struct iovec iov;
regset = regsets_info->regsets;
pid = lwpid_of (get_thread_lwp (current_inferior));
while (regset->size >= 0)
{
void *buf, *data;
int nt_type, res;
if (regset->size == 0
|| regsets_info->disabled_regsets[regset - regsets_info->regsets])
{
>>>>>>> regset ++; <<<<<<< HERE
continue;
}
Because info->disabled_regsets[] was not being initialized, and that
causes all sorts of wrong.
gdb/gdbserver/
2013-06-11 Pedro Alves <palves@redhat.com>
* linux-low.c (initialize_regsets_info): Use xcalloc instead of
xmalloc.
All target descriptions must be initialized at startup, but this one was forgotten.
gdb/gdbserver/
2013-06-11 Pedro Alves <palves@redhat.com>
* linux-x86-low.c (initialize_low_arch): Call
init_registers_x32_avx_linux.
While enhancing the warning printed in when SuspendThread fails,
I accidently changed the format used to print the error code
from %u to %d. This patch reverts it back.
gdb/ChangeLog:
* windows-nat.c (thread_rec): Revert format used to print
error code returned by SuspendThread from %d back to %u.
The windows-nat.c debug traces print the thread ID in base 16,
but give no indication of it. So, in a trace like the following...
gdb: kernel event for pid=4816 tid=720 code=CREATE_THREAD_DEBUG_EVENT)
... where tid is "720", it's easy to be confused and think that
the thread ID is 720 rather than 0x720. This patch avoids the
confusion by adding the usual "0x" prefix used for hexadecimal
values.
gdb/ChangeLog:
* windows-nat.c (windows_continue): Add "0x" prefix for thread
ID in debug trace.
(get_windows_debug_event): Likewise, for all debug traces.
This patch adds the thread ID to a warning printed when a call to
SuspendThread fails. It will help investigate issues, particularly
when correlated with the various debug traces provided by the
windows-nat module.
For the record, the output has been changed from...
warning: SuspendThread failed. (winerr 6)
... to ...
warning: SuspendThread (tid=0x720) failed. (winerr 6)
gdb/ChangeLog:
* window-nat.c (thread_rec): Add thread ID in SuspendThread
warning message.
Fix incorrect usage of ELF32_R_SYM introduced in ifunc changes.
bfd/ChangeLog:
2013-06-11 Will Newton <will.newton@linaro.org>
* elf64-aarch64.c (elf_aarch64_get_local_sym_hash): Use
ELF64_R_SYM instead of ELF32_R_SYM.
* config/tc-mips.c (append_insn): Don't do branch relaxation for
MIPS-3D instructions either.
(md_convert_frag): Update the COPx branch mask accordingly.
* config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
option.
* doc/as.texinfo (Overview): Add --relax-branch and
--no-relax-branch.
* doc/c-mips.texi (MIPS Opts): Document --relax-branch and
--no-relax-branch.
gas/testsuite/
* gas/mips/relax-bc1any.l: New test.
* gas/mips/relax-bc1any.s: New test source.
* gas/mips/mips.exp: Run the new test.
Since many people don't have a Blackfin toolchain available, only try to
regenerate the header file when in maintainer mode. This file rarely changes,
and when it does, we commit the generated output, so there's almost never a
need to run directly on an end system.
2013-06-08 Catherine Moore <clm@codesourcery.com>
* config/tc-mips.c (is_opcode_valid): Build ASE mask.
(is_opcode_valid_16): Pass ase value to opcode_is_member.
(append_insn): Change INSN_xxxx to ASE_xxxx.
include/
2013-06-08 Catherine Moore <clm@codesourcery.com>
* opcode/mips.h (mips_opcode): Add ase field.
(INSN_ASE_MASK): Delete.
(INSN_DSP): Rename to ASE_DSP. Provide new value.
(INSN_DSPR2): Rename to ASE_DSPR2. Provide new value.
(INSN_MCU): Rename to ASE_MCU. Provide new value.
(INSN_MDMX): Rename to ASE_MDMX. Provide new value.
(INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value.
(INSN_MT): Rename to ASE_MT. Provide new value.
(INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value.
(INSN_VIRT): Rename to ASE_VIRT. Provide new value.
(INSN_VIRT64): Rename to ASE_VIRT64. Provide new value.
(opcode_is_member): Add ase argument. Check ase.
opcodes/
2013-06-08 Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* micromips-opc.c (D32, D33, MC): Update definitions.
(micromips_opcodes): Initialize ase field.
* mips-dis.c (mips_arch_choice): Add ase field.
(mips_arch_choices): Initialize ase field.
(set_default_mips_dis_options): Declare and setup mips_ase.
* mips-opc.c (M3D, SMT, MX, IVIRT, IVIRT64, D32, D33, D64,
MT32, MC): Update definitions.
(mips_builtin_opcodes): Initialize ase field.
