commit eab996435f
Author: Jan Beulich <jbeulich@suse.com>
Date: Tue Nov 7 13:58:32 2023 +0100
ld/x86: reduce testsuite dependency on system object files
changed some C compiler tests to assembler/linker tests which introduced
2 problems:
1. It broke x32 binutils tests since --64 was passed to assembler, but
-m elf_x86_64 wasn't passed to linker.
2. -nostdlib was passed to C compiler driver to exclude standard run-time
files which should be avoided with -r option for linker tests.
Fix them by passing -m elf_x86_64 to linker and removing -nostdlib for
linker tests with -r.
PR ld/30722
* testsuite/ld-x86-64/x86-64.exp: Pass -m elf_x86_64 to linker
for tests with --64. Remove -nostdlib for tests with -r.
The following patch attempts to use x86 SHA ISA if available to speed
up in my testing about 2.5x sha1 build-id processing (in my case on
AMD Ryzen 5 3600) while producing the same result.
I believe AArch64 has similar HW acceleration for SHA1, perhaps it
could be added similarly.
Note, seems lld uses BLAKE3 rather than md5/sha1. I think it would be
a bad idea to lie to users, if they choose --buildid=sha1, we should
be using SHA1, not some other checksum, but perhaps we could add some other
--buildid= styles and perhaps make one of the new the default.
Tested on x86_64-linux, both on Intel i9-7960X (which doesn't have
sha_ni ISA support) without/with the patch and on AMD Ryzen 5 3600
(which does have it) without/with the patch.
2023-11-28 Jakub Jelinek <jakub@redhat.com>
include/
* sha1.h (sha1_process_bytes_fn): New typedef.
(sha1_choose_process_bytes): Declare.
libiberty/
* configure.ac (HAVE_X86_SHA1_HW_SUPPORT): New check.
* sha1.c: If HAVE_X86_SHA1_HW_SUPPORT is defined, include x86intrin.h
and cpuid.h.
(sha1_hw_process_bytes, sha1_hw_process_block,
sha1_choose_process_bytes): New functions.
* config.in: Regenerated.
* configure: Regenerated.
ld/
* ldbuildid.c (generate_build_id): Use sha1_choose_process_bytes ()
instead of &sha1_process_bytes.
PR 31067
* linker.c (_bfd_generic_link_add_one_symbol): When issuing a warning message, also display a message about the warning not being affected by garbage colleciton.
* ld.texi (Special Sections): New entry in the linker manual. Describes how the .gnu.warning and .gnu.warning.SYM sections behave.
Previously the condition prevented shared objects from being relaxed.
To remove the limitation, we need to update program header size and
.eh_frame_hdr size before relaxation.
commit d173146d9 "MIPS: Change all E_MIPS_* to EF_MIPS_*"
changed gas/config.in to rename USE_E_MIPS_ABI_O32 to USE_EF_MIPS_ABI_O32
this new name sorts differently when regenerating gas/config.in
commit e922d1eaa "Add ability to change linker warning messages into
errors when reporting executable stacks and/or executable segments."
Introduced two new help strings for --enable-error-execstack and
--enable-error-rwx-segments in configure.ac which weren't included
in ld/configure when regenerated.
* gas/config.in: Regenerate.
* ld/configure: Likewise.
The tests are not compatible with ilp32 abi: the GNU property
note is ABI dependent (size changes) and the disasm is ABI
dependent too. Making the test portable between the ABIs is
not trivial.
For now force lp64 abi.
In a safety context, it could interesting to track the trampolines being
generated, ensuring there are expected or not.
bfd/ChangeLog:
* elf32-ppc.c (ppc_elf_relax_section): Log branch fixups.
ld/ChangeLog:
* ld.texi (--print-map): Add new item about fixups.
PR ld/30722
Tests looking for certain .note-section recorded properties may not
involve object files from the underlying platform (e.g. via using the C
compiler for linking): Such object files may themselves have similar
note sections, and hence they may influence the overall outcome.
For now convert just the tests known to be affected by crt*.o coming
with "ISA v3 needed" notes. Eventually other tests ought to be
converted, too.
PR 30865
* ld.texi: Update description of the FILL command.
* testsuite/ld-scripts/fill2.d: New test.
* testsuite/ld-scripts/fill2.t: New test source.
* testsuite/ld-scripts/data.exp: Run the new test.
* testsuite/ld-x86-64/property-3.r: Update regexp to allow for targets which support x86-64-v3.
* testsuite/ld-x86-64/property-4.r: Likewise.
* testsuite/ld-x86-64/property-5.r: Likewise.
PR 27565
* ldlex.l: Add REVERSE.
* ldgram.y: Allow REVERSE to be used wherever a sorting command can be used.
* ld.h (struct wildcard_spec): Add 'reversed' field.
* ldlang.h (lang_wild_statement_struct): Add 'filenames_reversed' field.
* ldlang.c (compare_sections): Add reversed parameter. (wild_sort): Reverse the comparison if requested. (print_wild_statement): Handle the reversed field.
* ld.texi: Document the new feature.
* NEWS: Mention the new feature.
* testsuite/ld-scripts/sort-file-reversed-1.d: New test driver.
* testsuite/ld-scripts/sort-file-reversed-1.t: New test source.
* testsuite/ld-scripts/sort-file-reversed-2.t: New test source.
* testsuite/ld-scripts/sort-file-reversed-2.d: New test driver.
* testsuite/ld-scripts/sort-sections-reversed-1.d: New test driver.
* testsuite/ld-scripts/sort-sections-reversed-1.t: New test source.
* testsuite/ld-scripts/sort-sections-reversed-2.t: New test source.
* testsuite/ld-scripts/sort-sections-reversed-2.d: New test driver.
* testsuite/ld-scripts/sort-sections-reversed-3.d: New test driver.
* testsuite/ld-scripts/sort-sections-reversed-3.t: New test source.
PR 28910
* lexsup.c (ld_options): Require that the --architecture option is given exactly two dashes, so that it does not become confused with the -a option.
This warning is triggered only when a stack parameter is given to
the linker.
ld/ChangeLog:
* emultempl/nto.em: Add warning when several QNX .note are
detected.
Up to now, the linker would always create a QNX stack note from scratch.
However, object files could already have such note, ending up into
duplicates. QNX loader doesn't handle that.
Update the mechanism to first search through the input files for a .note
section holding a QNX stack note. If none are found, then a new section
is created into the stub file as before. This requires this search to be
done once the file have been opened, moving the whole logic a bit later
in the emulation process.
As part for this update, also allow to request an executable stack
without necessarily having to provide its size as well. In this case, s
etup a default lazy stack of 0x1000.
ld/ChangeLog:
* emultempl/nto.em (nto_create_QNX_note_section): New Function.
(nto_lookup_QNX_note_section): New Function.
(nto_add_note_section): Move the creation of the note section
in the above new functions.
(nto_create_output_section_statements): rename nto_after_open
* testsuite/ld-aarch64/aarch64-nto.exp: add new test.
* testsuite/ld-aarch64/nto-stack-note-3.d: New test.
* testsuite/ld-aarch64/nto-stack-note.s: New test.
The linker will generate warnings if it is creating an executable
stack or a segment with all three read, write and execute permissions.
These settings are not appropriate for all targets including
MicroBlaze.
Signed-off-by: Neal Frager <neal.frager@amd.com>
Signed-off-by: Michael J. Eager <eager@eagercon.com>
The PLT entry in executables and shared libraries contains an indirect
branch, like
jmp *foo@GOTPCREL(%rip)
push $index_foo
jmp .PLT0
or
endbr64
jmp *foo@GOTPCREL(%rip)
NOP padding
which is used to branch to the function, foo, defined in another object.
Each R_X86_64_JUMP_SLOT relocation has a corresponding PLT entry.
The dynamic tags have been added to the x86-64 psABI to mark such PLT
entries:
6d824a52a4
Add an x86-64 linker option, -z mark-plt, to mark PLT entries with
#define DT_X86_64_PLT (DT_LOPROC + 0)
#define DT_X86_64_PLTSZ (DT_LOPROC + 1)
#define DT_X86_64_PLTENT (DT_LOPROC + 3)
1. DT_X86_64_PLT: The address of the procedure linkage table.
2. DT_X86_64_PLTSZ: The total size, in bytes, of the procedure linkage
table.
3. DT_X86_64_PLTENT: The size, in bytes, of a procedure linkage table
entry.
and set the r_addend field of the R_X86_64_JUMP_SLOT relocation to the
memory offset of the indirect branch instruction. The dynamic linker
can use these tags to update the PLT section to direct branch.
bfd/
* elf-linker-x86.h (elf_linker_x86_params): Add mark_plt.
* elf64-x86-64.c (elf_x86_64_finish_dynamic_symbol): Set the
r_addend of R_X86_64_JUMP_SLOT to the indirect branch offset
in PLT entry for -z mark-plt.
* elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Add
DT_X86_64_PLT, DT_X86_64_PLTSZ and DT_X86_64_PLTENT for
-z mark-plt.
(_bfd_x86_elf_finish_dynamic_sections): Set DT_X86_64_PLT,
DT_X86_64_PLTSZ and DT_X86_64_PLTENT.
(_bfd_x86_elf_get_synthetic_symtab): Ignore addend for
JUMP_SLOT relocation.
(_bfd_x86_elf_link_setup_gnu_properties): Set
plt_indirect_branch_offset.
* elfxx-x86.h (elf_x86_plt_layout): Add plt_indirect_branch_offset.
binutils/
* readelf.c (get_x86_64_dynamic_type): New function.
(get_dynamic_type): Call get_x86_64_dynamic_type.
include/
* elf/x86-64.h (DT_X86_64_PLT): New.
(DT_X86_64_PLTSZ): Likewise.
(DT_X86_64_PLTENT): Likewise.
ld/
* ld.texi: Document -z mark-plt and -z nomark-plt.
* emulparams/elf32_x86_64.sh: Source x86-64-plt.sh.
* emulparams/elf_x86_64.sh: Likewise.
* emulparams/x86-64-plt.sh: New file.
* testsuite/ld-x86-64/mark-plt-1.s: Likewise.
* testsuite/ld-x86-64/mark-plt-1a-x32.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1a.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1b-x32.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1b.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1c-x32.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1c.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1d-x32.d: Likewise.
* testsuite/ld-x86-64/mark-plt-1d.d: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run -z mark-plt tests.
Move .got before .data so that it can be protected with -zrelro. Also
separate .got.plt from .got if -znow is not in effect; the first two words
of .got.plt are placed within the relro region.
ld:
PR ld/30877
* emulparams/elf32lriscv-defs.sh (DATA_GOT, SEPARATE_GOTPLT):
Define.
* emulparams/elf64lriscv-defs.sh (SEPARATE_GOTPLT): Define.
* testsuite/ld-elf/binutils.exp (binutils_test): Remove riscv*-*-*
from relro_got expression.
