75 Commits

Author SHA1 Message Date
cc67f780ec sim: info: convert verbose field to a bool
The verbose argument has always been an int treated as a bool, so
convert it to an explicit bool.  Further, update the API docs to
match the reality that the verbose value is actually used by some
of the internal modules.
2023-01-18 20:47:55 -05:00
213516ef31 Update copyright year range in header of all files managed by GDB
This commit is the result of running the gdb/copyright.py script,
which automated the update of the copyright year range for all
source files managed by the GDB project to be updated to include
year 2023.
2023-01-01 17:01:16 +04:00
883be19774 sim: cpu: change default init to handle all cpus
All the runtimes were only initializing a single CPU.  When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup.  Change the default from 0 to the compile time value.
2022-12-25 02:10:46 -05:00
7e9c749ccc sim: mcore: move arch-specific settings to internal header
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to a new header which only
this port will include.
2022-12-23 08:32:58 -05:00
4c337f2dd3 sim: mcore: replace custom "word" type with int32_t
This is a 32-bit architecture with 32-bit registers, so replace the
custom "word" long int typedef with an explicit int32_t.  This is
a correctness fix since long will be 64-bits on most 64-bit hosts.
2022-12-22 21:55:47 -05:00
620dd532fe sim: mcore: invert sim_cpu storage 2022-12-21 00:00:00 -05:00
ee1cffd388 sim: common: change sim_{fetch,store}_register helpers to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-11-02 20:31:10 +05:45
5bab16fdf1 sim: reg: constify store helper
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
ed60d3edd5 sim: constify various integer readers
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
4a94e36819 Automatic Copyright Year update after running gdb/copyright.py
This commit brings all the changes made by running gdb/copyright.py
as per GDB's Start of New Year Procedure.

For the avoidance of doubt, all changes in this commits were
performed by the script.
2022-01-01 19:13:23 +04:00
6cbb891faa sim: mcore: switch to new target-newlib-syscall
Use the new target-newlib-syscall module.  This is needed to merge all
the architectures into a single build, and mcore has a custom syscall
table for its newlib/libgloss port.
2021-11-28 13:23:59 -05:00
e8f20a28b1 sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.
2021-11-15 02:53:29 -05:00
1fef66b0dc sim: split sim-signal.h include out
The sim-basics.h is too big and includes too many things.  This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
2021-06-18 00:50:14 -04:00
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
df68e12b3b sim: create header namespace
The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it.  So
create a new sim/ namespace and move the headers there.
2021-05-14 00:41:05 -04:00
91eea12156 sim: mcore: fix build time warnings
Once we fix a minor const warning we can enable -Werror in here.
2021-05-04 21:57:49 -04:00
a147f3ff8c sim: remove sys/times.h in most places
The v850 port used this, and then it got copied to other ports even
though it wasn't needed.  Clean it up to avoid portability issues on
platforms not providing this (e.g. mingw64 for Windows).
2021-05-04 21:56:38 -04:00
d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
2021-04-12 00:14:32 -04:00
3666a04883 Update copyright year range in all GDB files
This commits the result of running gdb/copyright.py as per our Start
of New Year procedure...

gdb/ChangeLog

        Update copyright year range in copyright header of all GDB files.
2021-01-01 12:12:21 +04:00
b811d2c292 Update copyright year range in all GDB files.
gdb/ChangeLog:

        Update copyright year range in all GDB files.
2020-01-01 10:20:53 +04:00
42a4f53d2b Update copyright year range in all GDB files.
This commit applies all changes made after running the gdb/copyright.py
script.

Note that one file was flagged by the script, due to an invalid
copyright header
(gdb/unittests/basic_string_view/element_access/char/empty.cc).
As the file was copied from GCC's libstdc++-v3 testsuite, this commit
leaves this file untouched for the time being; a patch to fix the header
was sent to gcc-patches first.

gdb/ChangeLog:

	Update copyright year range in all GDB files.
2019-01-01 10:01:51 +04:00
e2882c8578 Update copyright year range in all GDB files
gdb/ChangeLog:

        Update copyright year range in all GDB files
2018-01-02 07:38:06 +04:00
61baf725ec update copyright year range in GDB files
This applies the second part of GDB's End of Year Procedure, which
updates the copyright year range in all of GDB's files.

gdb/ChangeLog:

        Update copyright year range in all GDB files.
2017-01-01 10:52:34 +04:00
2e3d4f4d5d sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly
2016-01-03  Mike Frysinger  <vapier@gentoo.org>

	* sim-options.c (sim_parse_args): Mark argv array const.
	* sim-options.h (sim_parse_args): Likewise.
2016-01-06 21:48:59 -05:00
77cf2ef5dc sim: parse_args: display getopt error ourselves
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed.  Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
2016-01-03 22:07:39 -05:00
618f726fcb GDB copyright headers update after running GDB's copyright.py script.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2016-01-01 08:43:22 +04:00
7eed1055b8 sim: mcore: pull cpu state out of global scope
This avoids using global variables to hold the cpu state so we can
better integrate with the sim common code.

There's also a minor fix here where we move the pc register back into
the state that is accessible by the asints array.  When it was pulled
out previously, the reg store/fetch functions broke, but no one really
noticed as the mcore gdb port was dropped a while back.
2015-11-15 08:11:15 -05:00
9ef4651c49 sim: mcore: switch to common sim-reg
This is not entirely useful as mcore doesn't (yet) store its register
state in the cpu state, but it does allow for switching to the common
code for these functions.
2015-11-15 07:59:09 -05:00
02962cd9ea sim: mcore: convert to common reason/resume logic
Switch over to the common event loop logic so we don't have to maintain
the exception/exit logic ourselves.
2015-11-15 07:55:13 -05:00
6e4f085c7f sim: sim-close: unify sim_close logic
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did.  Now we have a single module that takes care of
all the logic for us.

Most of the non-cgen based ones could be deleted outright.  The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.

We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
2015-11-15 02:30:19 -05:00
7d5c6c43ca sim: syscall: add common sim_syscall helpers
Many ports have the same sim syscall logic, so add some helpers to handle
all the common details.  The arches still have to deal with the unpacking
and packing of the syscall arguments, but the rest of the sim<->callback
glue is now shared.
2015-06-17 13:19:51 -04:00
61a0c964e6 sim: syscall: unify memory helpers
Almost every port implements these two callbacks in the same way, so
unify them in the common layer.
2015-06-17 13:19:51 -04:00
43236bb255 sim: mcore: clean up printf warnings
These printf statements are showing "word" objects which are typedefed
from long, so make sure to use l with %x when printing them to avoid
warnings from gcc.
2015-04-21 03:10:16 -04:00
f63036b811 sim: mcore: convert to common memory/verbose functions
Re-use the existing memory core that handles reads/writes.

The verbose command is converted to the common --verbose flag
since only a few call sites use it now.
2015-04-21 03:10:16 -04:00
e53e5aab53 sim: mcore: drop watchpoint/dumpmem/clearstats support
In preparation for converting to the common memory framework, the custom
commands get in our way.  But when we realize that gdb support has been
dropped for mcore, it makes things a bit easier: the main runner does not
let you run arbitrary commands once simulation starts.

So lets disable watchpoint support until it can be converted to the common
watchpoint logic.  There's already an ifdef to let us do that.

We straight up drop support for the dumpmem command (no other sim supports
this, and if it's a feature people want, we can add a common func) and the
clearstats command (not a big deal -- just restart your simulation).

We leave in place the verbose check points as a follow up commit will cut
that over to common logic.
2015-04-21 03:10:16 -04:00
767e68f1b9 sim: mcore: switch to common syscall handling
Now that libgloss has a header tracking the syscalls for this arch, we
can update the database to include it for the symbolic constants/maps.
Then we can switch the mcore syscall callbacks over to the common ones.
2015-04-21 03:10:16 -04:00
034685f9ce sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
2015-04-17 02:44:30 -04:00
4c0cab1e21 sim: avr/mcore/moxie: fill out sim-cpu pc fetch/store helpers
This makes the common sim-cpu logic work.
2015-04-16 02:13:50 -04:00
97eca187b3 sim: mcore/microblaze: delete dead code
The mcore port had a few structs/defines that were never used.

Similarly, the microblaze port, because it was copied from mcore, has
that same dead code, and more.  The watchpoint logic was never actually
used.  Punt it all.
2015-03-29 17:25:53 -04:00
ea6b7543b4 sim: mcore: convert to nrun
A lot of cpu state is stored in global variables, as is memory handling.
The sim_size support needs unwinding at some point.  But at least this
is an improvement on the status quo.
2015-03-29 04:14:27 -04:00
aac18a6996 sim: mcore: drop sbrk support
The sbrk syscall assumes the sbrk region starts after the bss and the
current implementation requires a bss section to exist.  Since there
is no requirement for programs to have a bss in general, we want to
drop this check.  However, there is still the sbrk syscall that wants
to know about the region.

Since libgloss doesn't actually use the sbrk syscall (it implements
sbrk in its own way), and the sim really shouldn't enforce a specific
memory layout on programs, lets simply delete sbrk support.  Now it
always returns an error.
2015-03-29 04:14:27 -04:00
ba14f9419d sim: mcore/microblaze: strip trailing whitespace
No functional changes here.
2015-03-16 03:16:59 -04:00
feb703b3f4 sim: mcore/microblaze: clean up a bit
Fix some various warnings and enable the extra warnings options.
2015-03-16 03:15:31 -04:00
dc049bf460 sim: drop unused headers
These look like left over hacks from the days where we had to protect
ourselves from the compiler and C library.  None of these checks are
relevant, and we have common configure logic to do header tests.  Punt
them all now.
2015-02-20 00:16:14 -05:00
4c4ca605d5 sim: drop unused sim_kill function
This has been deprecated for a long time and no one calls it.
2015-02-19 20:42:14 -05:00
4185814eb4 sim/mcore/interp.c: Include "unistd.h".
The related warnings:

  gcc -DHAVE_CONFIG_H     -DPROFILE=1 -DWITH_PROFILE=-1          -DDEFAULT_INLINE=0              -I. -I../../../binutils-gdb/sim/mcore -I../common -I../../../binutils-gdb/sim/mcore/../common -I../../include -I../../../binutils-gdb/sim/mcore/../../include -I../../bfd -I../../../binutils-gdb/sim/mcore/../../bfd -I../../opcodes -I../../../binutils-gdb/sim/mcore/../../opcodes  -g -O2 -c -o interp.o -MT interp.o -MMD -MP -MF .deps/interp.Tpo ../../../binutils-gdb/sim/mcore/interp.c
../../../binutils-gdb/sim/mcore/interp.c: In function ‘handle_trap1’:
../../../binutils-gdb/sim/mcore/interp.c:559:22: warning: implicit declaration of function ‘link’ [-Wimplicit-function-declaration]
         cpu.gr[RET1] = link ((char *) a[0], (char *) a[1]);
                        ^
  ../../../binutils-gdb/sim/mcore/interp.c:585:22: warning: implicit declaration of function ‘access’ [-Wimplicit-function-declaration]
         cpu.gr[RET1] = access ((char *) a[0], a[1]);
                        ^

2015-02-11  Chen Gang <gang.chen.5i5j@gmail.com>

        * interp.c: Include "unistd.h".
2015-02-11 21:46:30 +08:00
cd71915c77 sim: Be sure of calling freeargv() after successfully call buildargv().
Or there will be memory leak.

2015-02-02  Chen Gang <gang.chen.5i5j@gmail.com>

	* mcore/interp.c (sim_do_command): Call freeargv() before return.
2015-02-03 04:03:38 +08:00
32d0add0a6 Update year range in copyright notice of all files owned by the GDB project.
gdb/ChangeLog:

        Update year range in copyright notice of all files.
2015-01-01 13:32:14 +04:00
60d847df0b sim: constify arg to sim_do_command
It is rare for people to want to modify the cmd arg.  In general, they
really shouldn't be, but a few still do.  For those who misbehave, dupe
the string locally so they can bang on it.
2014-03-10 22:57:29 -04:00
b2b255bdf3 sim: constify prog_name
There's no need for the prog_name handed down to the core to be mutable,
so add const markings to it and all the related funcs.
2014-03-05 01:42:44 -05:00