01737f42d8
mips: Add multi-processor support for r5900. Others might work.
...
common, igen: Fix MP related bugs.
1998-02-01 03:29:48 +00:00
9ec6741b17
igen: Fix SMP simulator generator support.
...
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
1998-01-31 06:23:41 +00:00
2d44e12a27
Use macro GPR_SET(N,VAL) to clear zero registers.
1998-01-21 22:08:37 +00:00
232156dee9
o Add SIM_SIGFPE to sim-signals
...
o Start SIM_SIG* at 64 so that the use of host signal numbers can be
detected and reported.
o Update MIPS simulator to use sim-signal.
1997-11-20 09:50:36 +00:00
a09a30d298
Allow reads/writes to C0_CONFIG register.
1997-11-20 09:17:06 +00:00
030843d7f8
Fix IGEN version of MFC0, MTC0, SWC1, LWC1, SDC1, LDC1, LWXC1,
...
SWXC1MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1, MULT, MULTU, BEQZ, ...MTHI,
MFHI instructions.
Trace nullified instruction.
1997-11-11 07:50:13 +00:00
95469cebdd
Replace global IPC with function argument cia or current instruction
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address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
1997-11-06 14:24:57 +00:00
7ce8b9178c
IGEN likes to cache the current instruction address (CIA). Change the
...
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
1997-11-06 09:16:16 +00:00
63be8febf7
Rewrite the MIPS simulator's memory model so that it uses the generic
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common/sim-core.
Add support for 3, 5, 6, 7 byte transfers to sim core.
1997-11-05 08:17:26 +00:00
22de994d0e
Delete -l and -n options, didn't do anything.
...
Rename option trace to dinero-trace & dinero-file - -t clashed with
common options.
Enable common trace options.
1997-11-05 01:08:12 +00:00
525d929e49
Rewrite sim_monitor (implements read, write, open, et.al. system
...
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write. This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
1997-11-05 00:08:14 +00:00
0425cfb3af
Correct r5900 sanitization.
1997-11-04 05:50:22 +00:00
01b9cd49ca
common/sim-bits.h: Document ROTn macro.
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igen/{igen.c,ld-insns.h}: Document mnemonic string formats.
mips/Makefile.in: Add dependencies for files included by mips.igen
mips/vr5400.igen: checkpoint vr5400 instructions.
1997-10-29 04:02:30 +00:00
dad6f1f326
Add function to fetch 32bit instructions
...
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
1997-10-24 06:43:51 +00:00
92ad193bb0
Use SIM*_OVERFLOW_RESULT defined in sim-alu.h
1997-10-21 07:57:33 +00:00
e2f8ffb736
Delete profile support from MIPS simulator, use sim/common/sim-profile
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module instead.
Generate a "gmon.out" (gprof) when profiling the target PC.
Add target PC profiling option --profile-pc-granularity (bucket size)
1997-10-21 03:41:21 +00:00
fb5a2a3e39
Make mips registers of type unsigned_word.
...
Ensure all references to MIPS registers use same type.
1997-10-20 06:28:53 +00:00
ea985d2472
Move register definitions and macros out of interp.c and into sim-main.h
1997-10-16 03:50:48 +00:00
0c2c5f6141
Move global MIPS simulator variables into sim_cpu struct.
1997-10-14 09:26:03 +00:00
18c64df613
o Add support for configuring wordsize, fp hardware and target
...
endianness. Provide defaults for some tier-1 mips targets.
o Parameterize all functions with SIM_DESC.
1997-10-14 07:27:31 +00:00
