The defs.h header will take care of including the various config.h
headers. For now, it's just config.h, but we'll add more when we
integrate gnulib in.
This header should be used instead of config.h, and should be the
first include in every .c file. We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h. We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way. Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
I finally got the all-targets sim building with Clang, these are all the
instances where an ATTRIBUTE_PRINTF or ATTRIBUTE_NULL_PRINTF attribute
needed to be added to avoid errors like:
/home/simark/src/binutils-gdb/sim/aarch64/../common/sim-profile.c:464:19: error: format string is not a string literal [-Werror,-Wformat-nonliteral]
vfprintf (fp, fmt, ap);
^~~
There are more fixes needed to get everything building, but adding these
attributes is trivial enough, so I send them all in a single patch.
Adding the format attributes introduces some format string errors when
building with GCC (because now format strings are checked), so
corresponding changes are needed to avoid breaking the build. Other
than simple format string specified changes, there is this one:
/home/simark/src/binutils-gdb/sim/aarch64/../common/hw-events.c: In function 'hw_event_queue_schedule':
/home/simark/src/binutils-gdb/sim/aarch64/../common/hw-events.c:95:15: error: too many arguments for format [-Werror=format-extra-args]
95 | NULL, dummy);
| ^~~~~
We can fix it and avoid using a dummy variable by simply calling
hw_event_queue_schedule_tracef instead of
hw_event_queue_schedule_vtracef.
sim/arm/ChangeLog:
* armdefs.h (ARMul_ConsolePrint): Use format attribute.
* wrapper.c (op_printf): Likewise.
sim/bfin/ChangeLog:
* interp.c (sim_open): Adjust format string specifier.
sim/common/ChangeLog:
* hw-events.h (hw_event_queue_schedule_tracef): Use format attribute.
(hw_event_queue_schedule_vtracef): Likewise.
* hw-tree.h (hw_tree_vparse): Likewise.
* sim-profile.c (profile_vprintf): Likewise.
* sim-trace.c (dis_printf): Likewise.
* sim-trace.h (trace_printf): Likewise.
(trace_vprintf): Likewise.
* sim-utils.h (sim_do_commandf): Likewise.
* hw-events.c (hw_event_queue_schedule): Use
hw_event_queue_schedule_tracef.
sim/rx/ChangeLog:
* trace.c (op_printf): Likewise.
sim/v850/ChangeLog:
* interp.c (sim_open): Adjust format string specifier.
Change-Id: I1445115ce57db15bb8e35dca93014555e7555794
* Makefile.in (SIM_EXTRA_CFLAGS): Add -lm.
* armdefs.h (ARMdval, ARMfval): New types.
(ARM_VFP_reg): New union.
(struct ARMul_State): Add VFP_Reg and FPSCR fields.
(VFP_fval, VFP_uword, VFP_sword, VFP_dval, VFP_dword): Accessor
macros for the new VFP_Reg field.
* armemu.c (handle_v6_insn): Add code to handle MOVW, MOVT,
QADD16, QASX, QSAX, QSUB16, QADD8, QSUB8, UADD16, USUB16, UADD8,
USUB8, SEL, REV, REV16, RBIT, BFC, BFI, SBFX and UBFX
instructions.
(handle_VFP_move): New function.
(ARMul_Emulate16): Add checks for newly supported v6
instructions. Add support for VMRS, VMOV and MRC instructions.
(Multiply64): Allow nRdHi == nRm and/or nRdLo == nRm when
operating in v6 mode.
* armemu.h (t_resolved): Define.
* armsupp.c: Include math.h.
(handle_VFP_xfer): New function. Handles VMOV, VSTM, VSTR, VPUSH,
VSTM, VLDM and VPOP instructions.
(ARMul_LDC): Test for co-processor 10 or 11 and pass call to the
new handle_VFP_xfer function.
(ARMul_STC): Likewise.
(handle_VFP_op): New function. Handles VMLA, VMLS, VNMLA, VNMLS,
VNMUL, VMUL, VADD, VSUB, VDIV, VMOV, VABS, VNEG, VSQRT, VCMP,
VCMPE and VCVT instructions.
(ARMul_CDP): Test for co-processor 10 or 11 and pass call to the
new handle_VFP_op function.
* thumbemu.c (tBIT, tBITS, ntBIT, ntBITS): New macros.
(test_cond): New function. Tests a condition and returns non-zero
if the condition has been met.
(handle_IT_block): New function.
(in_IT_block): New function.
(IT_block_allow): New function.
(ThumbExpandImm): New function.
(handle_T2_insn): New function. Handles T2 thumb instructions.
(handle_v6_thumb_insn): Add next_instr and pc parameters.
(ARMul_ThumbDecode): Add support for IT blocks. Add support for
v6 instructions.
* wrapper.c (sim_create_inferior): Detect a thumb address and call
SETT appropriately.
* armdefs.h: Define ARMsword and ARMsdword. Use stdint.h when
available.
* armemu.c: Use them.
* armvirt.c (ARMul_MemoryInit): Use correct type for size.
* configure.ac: Check for stdint.h.
* config.in: Regenerate.
* configure: Regenerate.
(ARMulEmulate32): Call handle_v6_insn when a possible v6 insn is found.
* armdefs.h (struct ARMul_State): Add new field: is_v6.#
(ARM_v6_Prop): Define.
* arminit.c (ARMul_NewState): Initialise the v6 flag.
(ARMul_SelectProcessor): Determine if the v6 flag should be set.
* wrapper.c (sim_create_inferior): For unknown architectures, default to allowing the v6 instructions.
2001-04-18 matthew green <mrg@redhat.com>
* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
(read_cp15_reg): Make non-static.
(XScale_cp15_LDC): Update for write_cp15_reg() change.
(XScale_cp15_MCR): Likewise.
(XScale_cp15_write_reg): Likewise.
(XScale_check_memacc): New function. Check for breakpoints being
activated by memory accesses. Does not support the Branch Target
Buffer.
(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
(XScale_debug_moe): New function. Set the debug Method Of Entry,
if configured.
(write_cp14_reg): Reset count counter if requested.
* armdefs.h (struct ARMul_State): New members `LastTime' and
`CP14R0_CCD' used for the timer/counters.
(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
defines for XScale registers.
(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
(ARMul_Emulate32): Handle the clock counter and hardware instruction
breakpoints. Call XScale_set_fsr_far() for software breakpoints and
software interrupts.
(LoadMult): Call XScale_set_fsr_far() for data aborts.
(LoadSMult): Likewise.
(StoreMult): Likewise.
(StoreSMult): Likewise.
* armemu.h (write_cp15_reg): Update prototype.
* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
register 0.
* armvirt.c (GetWord): Call XScale_check_memacc().
(PutWord): Likewise.
(ARM_Strong_Prop, STRONGARM): Define.
* arminit.c (ARMul_NewState): Reset is_StrongARM.
(ARMul_SelectProcessor): Set is_StrongARM.
* wrapper.c (sim_create_inferior): Use bfd machine type to
determine processor type to emulate.
* armemu.h (BUSUSEDINCPCS, BUSUSEDINCPCN): Don't increment PC
when emulating StrongARM.
