69839 Commits

Author SHA1 Message Date
8a1241ef4b Regenerate. 2011-06-06 14:51:42 +00:00
9f47e25402 2011-06-06 Pedro Alves <pedro@codesourcery.com>
gdb/testsuite/
	* gdb.threads/pending-step.exp: Add more context to SIGTRAP match.
2011-06-06 13:33:08 +00:00
3dd5b83d5b 2011-06-06 Pedro Alves <pedro@codesourcery.com>
gdb/
	* infcall.c (run_inferior_call): Don't mask async.  Instead force
	a synchronous wait, if the target can async.

	* target.h (struct target_ops): Delete to_async_mask.
	(target_async_mask): Delete.
	* target.c (update_current_target): Delete references to to_async_mask.
	* linux-nat.c (linux_nat_async_mask_value): Delete.
	(linux_nat_is_async_p, linux_nat_can_async_p): Remove references
	to linux_nat_async_mask_value.
	(linux_nat_async_mask): Delete.
	(linux_nat_async, linux_nat_close): Remove references to
	linux_nat_async_mask_value.
	* record.c (record_async_mask_value): Delete.
	(record_async): Remove references to record_async_mask_value.
	(record_async_mask): Delete.
	(record_can_async_p, record_is_async_p): Remove references to
	record_async_mask_value.
	(init_record_ops, init_record_core_ops): Remove references to
	record_async_mask.
	* remote.c (remote_async_mask_value): Delete.
	(init_remote_ops): Remove reference to remote_async_mask.
	(remote_can_async_p, remote_is_async_p): Remove references to
	remote_async_mask_value.
	(remote_async): Remove references to remote_async_mask_value.
	(remote_async_mask): Delete.

	* infrun.c (fetch_inferior_event): Don't claim registers changed
	if the current thread is already not executing.
2011-06-06 12:47:07 +00:00
3c0013bf3b Sync from upstream:
2011-06-03  Nick Clifton  <nickc@redhat.com>
		    Ben Elliston  <bje@gnu.org>

	* config.sub (v850e1, v850es, v850e2, v850e2v3): New.

	2011-05-30  Chris Metcalf  <cmetcalf@tilera.com>
		    Ben Elliston  <bje@gnu.org>

	* config.guess (tile*:Linux:*:*): Use vendor "unknown", not
	"tilera", for consistency with other architectures.
	* config.sub (tile*-*, tilegx-*): Use a more general pattern for
	"tile" to allow matching tilepro, tilegx32 and other variants.
2011-06-06 10:36:06 +00:00
0aabe54e62 * targets.c (bfd_target): Make ar_max_namelen an unsigned char.
Add match_priority.
	* configure.in: Bump bfd version.
	* elfcode.h (elf_object_p): Delete hacks preventing match of
	EM_NONE and ELFOSABI_NONE targets when a better match exists.
	* elfxx-target.h (elf_match_priority): Define and use.
	* format.c (bfd_check_format_matches): Use target match_priority
	to choose best of multiple matching targets.  In cases with multiple
	matches rerun _bfd_check_format if we don't choose the last match.
	* aout-adobe.c, * aout-arm.c, * aout-target.h, * aout-tic30.c,
	* binary.c, * bout.c, * coff-alpha.c, * coff-i386.c, * coff-i860.c,
	* coff-i960.c, * coff-ia64.c, * coff-mips.c, * coff-or32.c,
	* coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic30.c,
	* coff-tic54x.c, * coff-x86_64.c, * coff64-rs6000.c, * coffcode.h,
	* i386msdos.c, * i386os9k.c, * ieee.c, * ihex.c, * mach-o-target.c,
	* mipsbsd.c, * mmo.c, * nlm-target.h, * oasys.c, * pdp11.c,
	* pe-mips.c, * pef.c, * plugin.c, * ppcboot.c, * som.c, * srec.c,
	* tekhex.c, * trad-core.c, * verilog.c, * versados.c, * vms-alpha.c,
	* vms-lib.c, * xsym.c: Init match_priority field.
	* configure: Regenerate.
	* bfd-in2.h: Regenerate.
2011-06-06 01:26:05 +00:00
586d24ef34 *** empty log message *** 2011-06-06 00:00:33 +00:00
1cba6f012d daily update 2011-06-06 00:00:05 +00:00
6248039b9e sim: bfin: add missing gitignore file 2011-06-05 21:32:34 +00:00
f020b4cec1 *** empty log message *** 2011-06-05 00:00:33 +00:00
841fd89ddb daily update 2011-06-05 00:00:05 +00:00
70b554c98b Revert the last change on elf_object_p.
2011-06-04  H.J. Lu  <hongjiu.lu@intel.com>

	PR ld/12842
	* elfcode.h (elf_object_p): Revert the last change.
2011-06-04 18:16:17 +00:00
1d7b4a7037 sim: bfin: import testsuite
Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite.  There are about ~800 tests here,
so I'm only attaching a compressed patch of them.  Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:44:22 +00:00
eb3243445a sim: bfin: add support for glued SIC interrupt lines
The BF537 family glues a bunch of peripherals into single interrupt lines
that run into the SIC.  To model this same behavior in the sim, we need to
use the glue-or device, and in order to use that, we need to tweak things
a bit in the mach code to allow declaring of these new devices.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:18:04 +00:00
082e1c4a87 sim: bfin: push SIC mappings to device tree
The machs.c file is the best place for holding cpu-specific details, so
restructure the way the SIC manages its ports to do just that.  Now the
SIC's have a standard set of input pins and the different line routing
from peripherals is kept in the device tree only.  This better models
the hardware where the SIC doesn't care about the exact peripheral that
is sending it stuff, just which input pin it gets it on.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-04 17:11:19 +00:00
d50ec8a7e1 * archures.c (bfd_arch_get_compatible): If one arch is unknown,
return the other arch.
	* elfcode.h (elf_object_p): Allow explicit match to generic ELF
	target.
2011-06-04 04:07:54 +00:00
f973cbf1c6 daily update 2011-06-04 00:00:05 +00:00
5ca1effa14 *** empty log message *** 2011-06-04 00:00:02 +00:00
64b9b33460 Various spelling fixes.
gdb/ChangeLog:

        From Stephen Kitt  <steve@sk2.org>
        * breakpoint.c, breakpoint.h, cli/cli-dump.c, dwarf2expr.c,
        gdbarch.c, gdbarch.sh, remote.c: Various spelling fixes.

gdb/testsuite/ChangeLog:

        From Stephen Kitt  <steve@sk2.org>
        * gdb.base/help.exp: Adjust following some spelling corrections
        in GDB.
2011-06-03 23:47:46 +00:00
91c6776727 Spelling fixe in sim/ppc/vm.c
From Stephen Kitt  <steve@sk2.org>
        * vm.c (vm_synchronize_context): Spelling fix in function
        documentation.
2011-06-03 23:47:04 +00:00
d009417cdb Minor spelling fix in ChangeLog. 2011-06-03 23:46:46 +00:00
945b3647f2 Minor spelling fix. 2011-06-03 23:46:25 +00:00
d535accd98 Add CpuF16C to CPU_BDVER2_FLAGS.
opcodes/
	2011-06-02  Quentin Neill  <quentin.neill@amd.com>

		* i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS.
		* i386-init.h: Regenerated.
2011-06-03 20:06:20 +00:00
325663dcd2 address size can be different from DW_OP_deref size
gdb/ChangeLog:

        * dwarf2expr.c (execute_stack_op) [DW_OP_deref]: Handle
        the case where ADDR_SIZE is different from TYPE_LENGTH (type).
2011-06-03 17:42:24 +00:00
164a5cb7bd PR ld/12682
* hash.c (higher_primer_number): Add more, small, prime numbers.
	(bfd_hash_set_default_size): Likewise.
2011-06-03 16:16:32 +00:00
8cf64490f2 gdb
* python/py-inferior.c (python_inferior_exit): Use inferior's exit
	code fields.
	* python/py-exitedevent.c (create_exited_event_object): Change
	type of 'exit_code'.  Optionally add exit_code attribute.
	(emit_exited_event): Change type of 'exit_code'.
	* python/py-event.h (emit_exited_event): Update.
	* mi/mi-interp.c (mi_inferior_exit): Print exit code.
	* infrun.c (handle_inferior_event): Set exit code fields on
	inferior.
	* inferior.h (struct inferior) <has_exit_code, exit_code>: New
	fields.
	* inferior.c (exit_inferior_1): Initialize new fields.
gdb/doc
	* gdb.texinfo (GDB/MI Async Records): Document 'exit-code' field.
	(Events In Python): Note that exit_code is optional.
2011-06-03 15:32:44 +00:00
8ddd9a20a7 * dwarf2expr.c (get_signed_type): New function.
(execute_stack_op) <DW_OP_shra>: Always perform a signed shift.
2011-06-03 14:57:29 +00:00
331fe61622 Fix attributation of previous delta. 2011-06-03 14:44:04 +00:00
a4482bb643 PR gas/12698
* config/tc-arm.c (parse_psr): Set m_profile to false when
	assembling for any architecture.
2011-06-03 14:42:47 +00:00
bc77a04af7 * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32am33lin.c
Add rule to build eelf32am33lin.c
	* Makefile.in: Regenerate.
2011-06-03 10:36:39 +00:00
582386937d oops - spelling fixes accidentally omitted from previous delta. 2011-06-03 10:11:06 +00:00
f8b960bc80 PR binutils/12752
* arm-dis.c (print_insn_coprocessor): Use bfd_vma type for
	computing address offsets.
	(print_arm_address): Likewise.
	(print_insn_arm): Likewise.
	(print_insn_thumb16): Likewise.
	(print_insn_thumb32): Likewise.
2011-06-03 10:04:03 +00:00
36f3e98103 sim: bfin: dma: fix indentation 2011-06-03 05:03:31 +00:00
366e5998a8 daily update 2011-06-03 00:00:06 +00:00
ce6e3af315 *** empty log message *** 2011-06-03 00:00:03 +00:00
7cdb37d9aa PR gold/12163
* gold/archive.cc (Archive::Archive): Initialize new data member.
	(Archive::include_all_members): Return if archive has already been
	included.
	* gold/archive.h (Archive::include_all_members_): New data member.
2011-06-02 20:13:23 +00:00
8dfd1e6d6e * objc-lang.c (find_methods): Increment objfile_csym earlier. 2011-06-02 18:44:01 +00:00
26d97720ed gas/
* config/tc-arm.c (parse_address_main): Handle -0 offsets.
	(encode_arm_addr_mode_2): Set default sign of zero here ...
	(encode_arm_addr_mode_3): ... and here.
	(encode_arm_cp_address): ... and here.
	(md_apply_fix): Use default sign of zero here.

	gas/testsuite/
	* gas/arm/inst.d: Adjust for signed zero offsets.
	* gas/arm/ldst-offset0.d: New test.
	* gas/arm/ldst-offset0.s: New test.
	* gas/arm/offset-1.d: New test.
	* gas/arm/offset-1.s: New test.

	ld/testsuite/
	Adjust tests for zero offset formatting.
	* ld-arm/cortex-a8-fix-bcc-plt.d: Adjust.
	* ld-arm/farcall-arm-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-arm-thumb.d: Adjust.
	* ld-arm/farcall-group-size2.d: Adjust.
	* ld-arm/farcall-group.d: Adjust.
	* ld-arm/farcall-mix.d: Adjust.
	* ld-arm/farcall-mix2.d: Adjust.
	* ld-arm/farcall-mixed-lib-v4t.d: Adjust.
	* ld-arm/farcall-mixed-lib.d: Adjust.
	* ld-arm/farcall-thumb-arm-blx-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-arm-pic-veneer.d: Adjust.
	* ld-arm/farcall-thumb-thumb.d: Adjust.
	* ld-arm/ifunc-10.dd: Adjust.
	* ld-arm/ifunc-3.dd: Adjust.
	* ld-arm/ifunc-4.dd: Adjust.
	* ld-arm/ifunc-5.dd: Adjust.
	* ld-arm/ifunc-6.dd: Adjust.
	* ld-arm/ifunc-7.dd: Adjust.
	* ld-arm/ifunc-8.dd: Adjust.
	* ld-arm/jump-reloc-veneers-long.d: Adjust.
	* ld-arm/tls-longplt-lib.d: Adjust.
	* ld-arm/tls-thumb1.d: Adjust.

	opcodes/
	* arm-dis.c (print_insn_coprocessor): Explicitly print #-0
	as address offset.
	(print_arm_address): Likewise. Elide positive #0 appropriately.
	(print_insn_arm): Likewise.
2011-06-02 15:32:10 +00:00
65fdb766be 2011-06-02 Pedro Alves <pedro@codesourcery.com>
gdb/
	* top.h (simplified_command_loop): Delete declaration.
2011-06-02 14:02:28 +00:00
cc643b88f1 Fix spelling mistakes. 2011-06-02 13:43:24 +00:00
4c422395e6 * config.bfd: Add bfd_elf32_rx_be_ns_vec.
* target.c: Likewise.
* configure.in: Likewise.
* configure.in: Regenerate.
* elf32-rx.c: Add elf32-rx-be-ns target.
(rx_elf_object_p): Never allow the be-ns target by default,
only allow it if the user requests it.
2011-06-02 00:51:19 +00:00
a39ef33120 daily update 2011-06-02 00:00:05 +00:00
598f424ddf *** empty log message *** 2011-06-02 00:00:03 +00:00
f62a3ca731 2011-05-31 Doug Kwan <dougkwan@google.com>
Asier Llano

	PR gold/12826
	* arm.cc (Target_arm::tag_cpu_arch_combine): Fix handling of
	arch value that equals to elfcpp::MAX_TAG_CPU_ARCH.
	* testsuite/Makefile.am: (MOSTLYCLEANFILES): Clean up.  Remove
	redundant arm_exidx_test.so.
	* testsuite/Makefile.in: Regenerate.
	(check_SCRIPTS): Add pr12826.sh
	(check_DATA): Add pr12826.stdout
	(pr12826.stdout, pr12826.so, pr12826_1.o, pr12826_2.o): New rules.
	* testsuite/pr12826.sh: New file.
	* testsuite/pr12826_1.s: Ditto.
	* testsuite/pr12826_1.s: Ditto.
2011-06-01 19:59:42 +00:00
4b819e1f6e Properly warn relocation in readonly section in a shared object.
2011-06-01  H.J. Lu  <hongjiu.lu@intel.com>

	* elf32-i386.c (elf_i386_size_dynamic_sections): Properly warn
	relocation in readonly section in a shared object.
	* elf64-x86-64.c (elf_x86_64_size_dynamic_sections): Likewise.
2011-06-01 19:42:01 +00:00
248d2a8fdc Add `sim_complete_command' definition to erc32 sim
This patch fixes a build failure at link time due to
sim_complete_command being undefined.  There was a recent change
that added this function to all the ports that do not use the
common/ subdir.  But somehow, the erc32 port got missed.

sim/erc32/ChangeLog:

        * interf.c (sim_complete_command): New stub function.
2011-06-01 17:35:02 +00:00
dbc0f13167 2011-06-01 Yao Qi <yao@codesourcery.com>
* gdb.base/ending-run.exp: Match __uClibc_main for uClibc.
2011-06-01 15:55:55 +00:00
f4b8c29b8a gdb: sim: automatically pass down sysroot
Since gdb sets up a nice sysroot path for us by default, automatically
pass it down to the sim target so it too gets a good default.  This does
not override anything the user explicitly specifies of course.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-06-01 15:29:07 +00:00
1706c19944 2011-06-01 Yao Qi <yao@codesourcery.com>
* objfiles.h (obj_section_addr): Update reference to objfile from
	`abfd' to `obfd'.
	(obj_section_endaddr): Likewise.
2011-06-01 14:46:23 +00:00
d19cd71304 Really correct email address. 2011-06-01 11:09:15 +00:00
9483a6ee46 * MAINTAINERS: Update my email address. 2011-06-01 11:08:25 +00:00