9 Commits

Author	SHA1	Message	Date
Nick Clifton	86e0da7a81	Use GPR_CLEAR instead of GPR_SET	2000-05-29 19:28:53 +00:00
Stan Shebs	c906108c21	Initial creation of sourceware repository	1999-04-16 01:35:26 +00:00
Stan Shebs	071ea11e85	Initial creation of sourceware repository	1999-04-16 01:34:07 +00:00
Andrew Cagney	687f3f1cef	Add multi-sim support to simulator.	1997-09-08 17:40:24 +00:00
Andrew Cagney	cd0d873d0f	Preliminary suport for xor-endian suport in core module.	1997-05-23 09:19:43 +00:00
Andrew Cagney	b526378484	Incorrect test for zero-r0 code gen.	1997-05-23 02:01:04 +00:00
Andrew Cagney	37a684b84d	o Make tic80 insn file more `cache ready' ... o Have igen always zero r0 instead of constantly checking if the designated register is r0.	1997-05-16 03:27:40 +00:00
Michael Meissner	d23af88239	Fix problems -Wall found	1997-05-05 18:16:10 +00:00
Andrew Cagney	15c1649391	TIc80 simulator checkpoint - runs 3 instructions - trap, addu, br.a.	1997-04-22 17:46:07 +00:00