Clean up includes a bit by making ports include opcodes/ headers
explicitly. This matches other projects, and makes it more clear
where these headers are coming from.
There's no need for these settings to be in sim-main.h which is shared
with common/ sim code, so move it all out to the existing m32r-sim.h.
Unfortunately, we can't yet drop the m32r-sim.h include from sim-main.h
as many of the generated CGEN files refer only to sim-main.h. We'll
have to improve the CGEN interface before we can make more progress,
but this is at least a minor improvement.
Move this out of the global sim-main.h and to the few files that
actually use functions from it. Only the cgen ports were pulling
this, so this makes cgen & non-cgen behave more the same.
The cgen-types.h header sets up types that are needed by cgen-defs.h,
so move the include out of sim-main.h and to that header. It might
be needed in other specific modules, but for now let's kick it out of
sim-main.h to make some progress. Things still build with just this.
This makes the simulator work the same regardless of the target (bare
metal m32r-elf or Linux m32r-linux-gnu) by unifying the traps code.
It was mostly already the same with the only difference being support
for trap #2 reserved for Linux syscalls. We can move that logic to
runtime by checking the current environment operating mode instead.
Now that we've unified sim-cpu, we can delete the duplicate sim-engine
hooks -- these targets defined these only because they didn't fully
implement the sim-cpu callbacks.
Since every target typedefs this the same way, move it to the common code.
We have to leave Blackfin behind here for now because of inter-dependencies
on types and headers: sim-base.h includes sim-model.h which needs types in
machs.h which needs types in bfim-sim.h which needs SIM_CPU.
Almost every target defines sim_cia the same way -- either using the
address_word type directly, or a type of equivalent size. The only
odd one out is sh64 (who has 32bit address_word and 64bit cia), and
even that case doesn't seem to make sense. We'll put off clean up
though of sh64 and at least set up a sensible default for everyone.
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state. This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.
It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
Now that all the targets are utilizing CPU_PC_{FETCH,STORE}, and the
cpu state is multicore, and the STATE_CPU defines match, we can move
it all to the common code.
This sets up the sim_state structure and the cpu member to match what we
do in most other sims, and what the common code suggests. This is a step
to unifying on the sim-cpu.o object.
* configure: Regenerate.
* sim-main.h: Protect against multiple inclusion.
Don't include cgen-scache.h,cgen-cpu.h,cgen-trace.h,cpuall.h.
Done by cgen-sim.h now.
* tconfig.in (SIM_HAVE_MODEL): Delete, moved to cgen-types.h.
* cpuall.h: Regenerate.
* cpu.h,decode.c,sem-switch.c,sem.c: Regenerate.
* mloop.in (extract16): Make static inline again.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(extract32): Ditto.
Simplify with call to @cpu@_fill_argbuf,@cpu@_fill_argbuf_tp.
(execute): Test ARGBUF_PROFILE_P before profiling.
Update calls to TRACE_INSN_INIT,TRACE_INSN_FINI.
* cpux.h,decodex.c,modelx.c,semx-switch.c: Regenerate.
* mloopx.in: Rewrite.
* arch-defs.h: Deleted.
* mloop.in: Renamed from mainloop.in.
* sem.c: Renamed from semantics.c.
* Makefile.in: Update.
* sem-ops.h: Deleted.
* mem-ops.h: Deleted.
start-sanitize-cygnus
Add cgen support for generating files.
end-sanitize-cygnus
(arch): Renamed from CPU.
* decode.c: Redone.
* decode.h: Redone.
* extract.c: Redone.
* model.c: Redone.
* sem-switch.c: Redone.
* sem.c: Renamed from semantics.c, and redone.
* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
(m32r_{fetch,store}_register): New functions.
(model_mark_{get,set}_h_gr): Prefix with m32r_.
(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
(h_cr_{get,set}): Prefix with m32r_.
(do_trap): Fetch state from current_cpu, not current_state.
Call sim_engine_halt instead of engine_halt.
* sim-if.c (alloc_cpu): New function.
(free_state): New function.
(sim_open): Call sim_state_alloc, and malloc space for selected cpu
type. Call sim_analyze_program.
(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
(sim_resume): Handle m32rx.
end-sanitize-m32rx
(sim_stop_reason): Deleted.
(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
(sim_{read,write}): Deleted.
(sim_engine_illegal_insn): New function.
* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
(_sim_cpu): Include member appropriate cpu_data member for the cpu.
(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
(sim_state): Delete members core,events,halt_jmp_buf.
Change `cpu' member to be a pointer to the cpu's struct, rather than
record inside the state struct.
* tconfig.in (WITH_DEVICES): Define here.
(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
