18 Commits

Author SHA1 Message Date
fd0975b96b sim: arm/bfin/rx: undefine page size from system headers
Some targets (like cygwin) will export page size defines that clash
with our local usage here.  Undefine the system one to fix building
for these targets.
2021-11-06 20:40:20 -04:00
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
91d6df784d sim: arm: delete unused code
These vestiges of the 20 year old emulator are just getting in the way.
Punt all the dead code we either don't compile or don't use.
2015-12-25 03:09:01 -05:00
454de2ee15 Remove extraneous whitespace from ARM sim sources.
* armcopro.c: Remove extraneous whitespace.
	* armdefs.h: Likewise.
	* armfpe.h: Likewise.
	* arminit.c: Likewise.
	* armopts.h: Likewise.
	* armos.c: Likewise.
	* armos.h: Likewise.
	* armrdi.c: Likewise.
	* armsupp.c: Likewise.
	* armvirt.c: Likewise.
	* bag.c: Likewise.
	* bag.h: Likewise.
	* communicate.c: Likewise.
	* communicate.h: Likewise.
	* dbg_conf.h: Likewise.
	* dbg_cp.h: Likewise.
	* dbg_hif.h: Likewise.
	* dbg_rdi.h: Likewise.
	* gdbhost.c: Likewise.
	* gdbhost.h: Likewise.
	* iwmmxt.c: Likewise.
	* iwmmxt.h: Likewise.
	* kid.c: Likewise.
	* main.c: Likewise.
	* maverick.c: Likewise.
	* parent.c: Likewise.
	* thumbemu.c: Likewise.
	* wrapper.c: Likewise.
2015-07-14 12:06:33 +01:00
51b318dec8 [sim] Update old contact info in GPL license notices
sim/ChangeLog:

        Update old contact info in GPL license notices.
2012-12-19 07:18:22 +00:00
3fd725ef34 Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.
gdb/sim/ChangeLog:

        Update the non-FSF-copyrighted files in sim to GPLv3 or later.
2012-12-19 07:12:02 +00:00
c4793bacbf 2005-09-19 Paul Brook <paul@codesourcery.com>
* armdefs.h: Define ARMsword and ARMsdword. Use stdint.h when
	available.
	* armemu.c: Use them.
	* armvirt.c (ARMul_MemoryInit): Use correct type for size.
	* configure.ac: Check for stdint.h.
	* config.in: Regenerate.
	* configure: Regenerate.
2005-09-19 14:21:09 +00:00
380d9419c9 Update the address of the FSF organization 2005-05-12 07:36:59 +00:00
c88931b0ed Only call XScale_check_memacc if in XScale mode. 2003-04-13 08:54:06 +00:00
10b57fcbd7 Only perform access checks if 'check' is set.
Report unknown machine numbers.
Formatting tidy ups.
2002-05-27 14:12:00 +00:00
c3ae2f98d0 * XScale coprocessor support.
2001-04-18  matthew green  <mrg@redhat.com>

	* armcopro.c (write_cp15_reg): Set CHANGEMODE if endianness changes.
	(read_cp15_reg): Make non-static.
	(XScale_cp15_LDC): Update for write_cp15_reg() change.
	(XScale_cp15_MCR): Likewise.
	(XScale_cp15_write_reg): Likewise.
	(XScale_check_memacc): New function. Check for breakpoints being
	activated by memory accesses.  Does not support the Branch Target
	Buffer.
	(XScale_set_fsr_far): New function. Set FSR and FAR for XScale.
	(XScale_debug_moe): New function. Set the debug Method Of Entry,
	if configured.
	(write_cp14_reg): Reset count counter if requested.
	* armdefs.h (struct ARMul_State): New members `LastTime' and
	`CP14R0_CCD' used for the timer/counters.
	(ARMul_CP13_R0_FIQ, ARMul_CP13_R0_IRQ, ARMul_CP13_R8_PMUS,
	ARMul_CP14_R0_ENABLE, ARMul_CP14_R0_CLKRST, ARMul_CP14_R0_CCD,
	ARMul_CP14_R0_INTEN0, ARMul_CP14_R0_INTEN1, ARMul_CP14_R0_INTEN2,
	ARMul_CP14_R0_FLAG0, ARMul_CP14_R0_FLAG1, ARMul_CP14_R0_FLAG2,
	ARMul_CP14_R10_MOE_IB, ARMul_CP14_R10_MOE_DB, ARMul_CP14_R10_MOE_BT,
	ARMul_CP15_R1_ENDIAN, ARMul_CP15_R1_ALIGN, ARMul_CP15_R5_X,
	ARMul_CP15_R5_ST_ALIGN, ARMul_CP15_R5_IMPRE, ARMul_CP15_R5_MMU_EXCPT,
	ARMul_CP15_DBCON_M, ARMul_CP15_DBCON_E1, ARMul_CP15_DBCON_E0): New
	defines for XScale registers.
	(XScale_check_memacc, XScale_set_fsr_far, XScale_debug_moe): Prototype.
	(ARMul_Emulate32, ARMul_Emulate26): Clean up function definition.
	(ARMul_Emulate32): Handle the clock counter and hardware instruction
	breakpoints.  Call XScale_set_fsr_far() for software breakpoints and
	software interrupts.
	(LoadMult): Call XScale_set_fsr_far() for data aborts.
	(LoadSMult): Likewise.
	(StoreMult): Likewise.
	(StoreSMult): Likewise.
	* armemu.h (write_cp15_reg): Update prototype.
	* arminit.c (ARMul_NewState): Initialise CP14R0_CCD and LastTime.
	(ARMul_Abort): If XScale, check for FIQ and IRQ being enabled in CP13
	register 0.
	* armvirt.c (GetWord): Call XScale_check_memacc().
	(PutWord): Likewise.
2001-04-18 16:39:37 +00:00
3cf84db9ef Do not enable alignment checking when loading unaligned thumb instructions. 2001-03-20 17:48:02 +00:00
917bca4f21 Add support for disabling alignment checks when performing GDB interface
calls or SWI emulaiton routines.  (Alignment checking code has not yet been
contributed).
2001-02-28 01:04:24 +00:00
88694af3f9 Detect installation of SWI vector by running program as well as loading program. 2001-02-01 00:14:40 +00:00
ae3c7619e1 * armvirt.c (ABORTS): Do not define. 2000-07-04 08:00:19 +00:00
6d358e869b Fix compile time warning messages. 2000-02-08 20:54:27 +00:00
dfcd3bfb6f import gdb-2000-02-04 snapshot 2000-02-05 07:30:26 +00:00
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00