21 Commits

Author SHA1 Message Date
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
13a590ca65 sim: use ARRAY_SIZE instead of ad-hoc sizeof calculations 2017-02-13 01:26:21 -05:00
454de2ee15 Remove extraneous whitespace from ARM sim sources.
* armcopro.c: Remove extraneous whitespace.
	* armdefs.h: Likewise.
	* armfpe.h: Likewise.
	* arminit.c: Likewise.
	* armopts.h: Likewise.
	* armos.c: Likewise.
	* armos.h: Likewise.
	* armrdi.c: Likewise.
	* armsupp.c: Likewise.
	* armvirt.c: Likewise.
	* bag.c: Likewise.
	* bag.h: Likewise.
	* communicate.c: Likewise.
	* communicate.h: Likewise.
	* dbg_conf.h: Likewise.
	* dbg_cp.h: Likewise.
	* dbg_hif.h: Likewise.
	* dbg_rdi.h: Likewise.
	* gdbhost.c: Likewise.
	* gdbhost.h: Likewise.
	* iwmmxt.c: Likewise.
	* iwmmxt.h: Likewise.
	* kid.c: Likewise.
	* main.c: Likewise.
	* maverick.c: Likewise.
	* parent.c: Likewise.
	* thumbemu.c: Likewise.
	* wrapper.c: Likewise.
2015-07-14 12:06:33 +01:00
73cb0348b2 Add support for ARM v6 instructions.
* Makefile.in (SIM_EXTRA_CFLAGS): Add -lm.
	* armdefs.h (ARMdval, ARMfval): New types.
	(ARM_VFP_reg): New union.
	(struct ARMul_State): Add VFP_Reg and FPSCR fields.
	(VFP_fval, VFP_uword, VFP_sword, VFP_dval, VFP_dword): Accessor
	macros for the new VFP_Reg field.
	* armemu.c (handle_v6_insn): Add code to handle MOVW, MOVT,
	QADD16, QASX, QSAX, QSUB16, QADD8, QSUB8, UADD16, USUB16, UADD8,
	USUB8, SEL, REV, REV16, RBIT, BFC, BFI, SBFX and UBFX
	instructions.
	(handle_VFP_move): New function.
	(ARMul_Emulate16): Add checks for newly supported v6
	instructions.  Add support for VMRS, VMOV and MRC instructions.
	(Multiply64): Allow nRdHi == nRm and/or nRdLo == nRm when
	operating in v6 mode.
	* armemu.h (t_resolved): Define.
	* armsupp.c: Include math.h.
	(handle_VFP_xfer): New function.  Handles VMOV, VSTM, VSTR, VPUSH,
	VSTM, VLDM and VPOP instructions.
	(ARMul_LDC): Test for co-processor 10 or 11 and pass call to the
	new handle_VFP_xfer function.
	(ARMul_STC): Likewise.
	(handle_VFP_op): New function.  Handles VMLA, VMLS, VNMLA, VNMLS,
	VNMUL, VMUL, VADD, VSUB, VDIV, VMOV, VABS, VNEG, VSQRT, VCMP,
	VCMPE and VCVT instructions.
	(ARMul_CDP): Test for co-processor 10 or 11 and pass call to the
	new handle_VFP_op function.
	* thumbemu.c (tBIT, tBITS, ntBIT, ntBITS): New macros.
	(test_cond): New function.  Tests a condition and returns non-zero
	if the condition has been met.
	(handle_IT_block): New function.
	(in_IT_block): New function.
	(IT_block_allow): New function.
	(ThumbExpandImm): New function.
	(handle_T2_insn): New function.  Handles T2 thumb instructions.
	(handle_v6_thumb_insn): Add next_instr and pc parameters.
	(ARMul_ThumbDecode): Add support for IT blocks.  Add support for
	v6 instructions.
	* wrapper.c (sim_create_inferior): Detect a thumb address and call
	SETT appropriately.
2015-06-28 19:14:36 +01:00
58b991b14e sim: arm: clean up misc warnings
Also delete a few unused funcs.
2015-03-30 12:58:23 -04:00
51b318dec8 [sim] Update old contact info in GPL license notices
sim/ChangeLog:

        Update old contact info in GPL license notices.
2012-12-19 07:18:22 +00:00
3fd725ef34 Update sim copyright headers from GPLv2-or-later to GPLv3-or-later.
gdb/sim/ChangeLog:

        Update the non-FSF-copyrighted files in sim to GPLv3 or later.
2012-12-19 07:12:02 +00:00
f253d86d7f PR sim/14540
* armsupp.c (ARMul_MRC): Return 0 if access to the MRC instruction
	is denied.
2012-09-03 10:13:11 +00:00
380d9419c9 Update the address of the FSF organization 2005-05-12 07:36:59 +00:00
10b57fcbd7 Only perform access checks if 'check' is set.
Report unknown machine numbers.
Formatting tidy ups.
2002-05-27 14:12:00 +00:00
ff44f8e352 Add support for XScale's coprocessor access check register.
Fix formatting.
2001-10-18 12:20:49 +00:00
dac07255f9 Check Mode not Bank in order to determine rocesor mode. 2001-05-08 08:28:28 +00:00
f1129fb8ff Add support for ARM's v5TE architecture and Intel's XScale extenstions 2000-11-30 01:55:12 +00:00
cf52c765b0 * armemu.h (GETSPSR): Call ARMul_GetSPSR().
* armsupp.c (ARMul_CPSRAltered): Zero out bits as they're
extracted from state->Cpsr, but preserve the unused bits.
(ARMul_GetCPSR): Get bits preserved in state->Cpsr.
(ARMul_GetSPSR, ARMul_FixCPSR): Use ARMul_GetCPSR() to
get the full CPSR word.
2000-07-04 06:19:29 +00:00
4ef2594f4e * armemu.h (PSR_FBITS, PSR_SBITS, PSR_XBITS, PSR_CBITS): New.
(SETPSR_F, SETPSR_S, SETPSR_X, SETPSR_C): New macros.
(SETPSR, SET_INTMODE, SETCC): Removed.
* armsupp.c (ARMul_FixCPSR, ARMul_FixSPSR): Do not test bit
mask.  Use SETPSR_* to modify PSR.
(ARMul_SetCPSR): Load all bits from value.
* armemu.c (ARMul_Emulate, msr): Do not test bit mask.
2000-07-04 06:06:30 +00:00
b0eae074ca * armdefs.h (SYSTEMBANK): Define as USERBANK.
* armsupp.c (ARMul_SwitchMode): Remove SYSTEMBANK cases.
2000-07-04 05:16:20 +00:00
c1a72ffdd6 Add support for v4 SystemMode. 2000-05-30 17:13:37 +00:00
6d358e869b Fix compile time warning messages. 2000-02-08 20:54:27 +00:00
dfcd3bfb6f import gdb-2000-02-04 snapshot 2000-02-05 07:30:26 +00:00
f743149ecb import gdb-2000-01-26 snapshot 2000-01-26 21:49:14 +00:00
c906108c21 Initial creation of sourceware repository 1999-04-16 01:35:26 +00:00