The newer update-copyright.py fixes file encoding too, removing cr/lf
on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and
embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
This commit adds disassembler styling for the ARM architecture.
The ARM disassembler is driven by several instruction tables,
e.g. cde_opcodes, coprocessor_opcodes, neon_opcodes, etc
The type for elements in each table can vary, but they all have one
thing in common, a 'const char *assembler' field. This field
contains a string that describes the assembler syntax of the
instruction.
Embedded within that assembler syntax are various escape characters,
prefixed with a '%'. Here's an example of a very simple instruction
from the arm_opcodes table:
"pld\t%a"
The '%a' indicates a particular type of operand, the function
print_insn_arm processes the arm_opcodes table, and includes a switch
statement that handles the '%a' operand, and takes care of printing
the correct value for that instruction operand.
It is worth noting that there are many print_* functions, each
function handles a single *_opcodes table, and includes its own switch
statement for operand handling. As a result, every *_opcodes table
uses a different mapping for the operand escape sequences. This means
that '%a' might print an address for one *_opcodes table, but in a
different *_opcodes table '%a' might print a register operand.
Notice as well that in our example above, the instruction mnemonic
'pld' is embedded within the assembler string. Some instructions also
include comments within the assembler string, for example, also from
the arm_opcodes table:
"nop\t\t\t@ (mov r0, r0)"
here, everything after the '@' is a comment that is displayed at the
end of the instruction disassembly.
The next complexity is that the meaning of some escape sequences is
not necessarily fixed. Consider these two examples from arm_opcodes:
"ldrex%c\tr%12-15d, [%16-19R]"
"setpan\t#%9-9d"
Here, the '%d' escape is used with a bitfield modifier, '%12-15d' in
the first instruction, and '%9-9d' in the second instruction, but,
both of these are the '%d' escape.
However, in the first instruction, the '%d' is used to print a
register number, notice the 'r' immediately before the '%d'. In the
second instruction the '%d' is used to print an immediate, notice the
'#' just before the '%d'.
We have two problems here, first, the '%d' needs to know if it should
use register style or immediate style, and secondly, the 'r' and '#'
characters also need to be styled appropriately.
The final thing we must consider is that some escape codes result in
more than just a single operand being printed, for example, the '%q'
operand as used in arm_opcodes ends up calling arm_decode_shift, which
can print a register name, a shift type, and a shift amount, this
could end up using register, sub-mnemonic, and immediate styles, as
well as the text style for things like ',' between the different
parts.
I propose a three layer approach to adding styling:
(1) Basic state machine:
When we start printing an instruction we should maintain the idea
of a 'base_style'. Every character from the assembler string will
be printed using the base_style.
The base_style will start as mnemonic, as each instruction starts
with an instruction mnemonic. When we encounter the first '\t'
character, the base_style will change to text. When we encounter
the first '@' the base_style will change to comment_start.
This simple state machine ensures that for simple instructions the
basic parts, except for the operands themselves, will be printed in
the correct style.
(2) Simple operand styling:
For operands that only have a single meaning, or which expand to
multiple parts, all of which have a consistent meaning, then I
will simply update the operand printing code to print the operand
with the correct style. This will cover a large number of the
operands, and is the most consistent with how styling has been
added to previous architectures.
(3) New styling syntax in assembler strings:
For cases like the '%d' that I describe above, I propose adding a
new extension to the assembler syntax. This extension will allow
me to temporarily change the base_style. Operands like '%d', will
then print using the base_style rather than using a fixed style.
Here are the two examples from above that use '%d', updated with
the new syntax extension:
"ldrex%c\t%{R:r%12-15d%}, [%16-19R]"
"setpan\t%{I:#%9-9d%}"
The syntax has the general form '%{X:....%}' where the 'X'
character changes to indicate a different style. In the first
instruction I use '%{R:...%}' to change base_style to the register
style, and in the second '%{I:...%}' changes base_style to
immediate style.
Notice that the 'r' and '#' characters are included within the new
style group, this ensures that these characters are printed with
the correct style rather than as text.
The function decode_base_style maps from character to style. I've
included a character for each style for completeness, though only
a small number of styles are currently used.
I have updated arm-dis.c to the above scheme, and checked all of the
tests in gas/testsuite/gas/arm/, and the styling looks reasonable.
There are no regressions on the ARM gas/binutils/ld tests that I can
see, so I don't believe I've changed the output layout at all. There
were two binutils tests for which I needed to force the disassembler
styling off.
I can't guarantee that I've not missed some untested corners of the
disassembler, or that I might have just missed some incorrectly styled
output when reviewing the test results, but I don't believe I've
introduced any changes that could break the disassembler - the worst
should be some aspect is not styled correctly.
PR 29457
* objdump.c (disassembler_color): Change type to an enum.
(disassembler_extended_color): Remove.
(usage): Update.
(objdump_color_for_assembler_style): Update.
(main): Update initialisation of disassembler_color. If not
initialised via a command line option, set based upon terminal
output.
* doc/binutils.texi: Update description of disassmbler-color
option.
* testsuite/binutils-all/arc/objdump.exp: Add
--disassembler-color=off option when disassembling.
* testsuite/binutils-all/arm/objdump.exp: Likewise.
The result of running etc/update-copyright.py --this-year, fixing all
the files whose mode is changed by the script, plus a build with
--enable-maintainer-mode --enable-cgen-maint=yes, then checking
out */po/*.pot which we don't update frequently.
The copy of cgen was with commit d1dd5fcc38ead reverted as that commit
breaks building of bfp opcodes files.
VDUP (neon) instructions can be conditional, but this is not taken into
account in the current master. This commit fixes that by i) fixing the
VDUP instruction masks and ii) adding logic for disassembling
conditional neon instructions.
opcodes * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
(print_insn_neon): Support disassembly of conditional
instructions.
binutils* testsuite/binutils-all/arm/vdup-cond.d: New test for testing that
conditional VDUP instructions are disassembled correctly.
* testsuite/binutils-all/arm/vdup-cond.s: New file used by
vdup-cond.d.
* testsuite/binutils-all/arm/vdup-thumb.d: New test for testing
that VDUP instructions (which are conditional in A32) can be
disassembled in thumb mode.
* testsuite/binutils-all/arm/vdup-cond.s: New file used by
vdup-thumb.d.
The following tests fail on wince as they rely on mapping symbols to
give them a fixed order.
This skips them on platforms that don't have mapping symbols.
binutils/ChangeLog:
* testsuite/binutils-all/arm/in-order-all.d: Skip on pe, wince, coff.
* testsuite/binutils-all/arm/in-order.d: Likewise.
* testsuite/binutils-all/arm/out-of-order-all.d: Likewise.
* testsuite/binutils-all/arm/out-of-order.d: Likewise.
This fixes the testcases that are failing due to my recent patch.
It turns out that the start address across baremetal and linux builds
isn't entirely predictable without a linker script. Since the address
themselves are not the important thing I am ignoring them now.
Secondly I was encoding data using .word using non 0 values, however
because .word is subjected to endiannes these non-zero values under
big-endian happen to fall into the encoding space of instructions which
changes the disassembly. Using 0 fixes this problem and the purpose of
the test still holds, though objdump will dump ... for data only sections,
which is ok as the data/insn mixed sections will test the patch.
The ARM Attributes sections is not important and is ignored.
binutils/ChangeLog:
* testsuite/binutils-all/aarch64/in-order.d: Likewise.
* testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.
* testsuite/binutils-all/aarch64/out-of-order.d: Likewise.
* testsuite/binutils-all/aarch64/out-of-order.s: Likewise.
* testsuite/binutils-all/arm/in-order-all.d: Likewise.
* testsuite/binutils-all/arm/in-order.d: Likewise.
* testsuite/binutils-all/arm/out-of-order-all.d: Likewise.
* testsuite/binutils-all/arm/out-of-order.d: Likewise.
* testsuite/binutils-all/arm/out-of-order.s: Likewise.
Similar to the AArch64 patches the Arm disassembler has the same issues with
out of order sections but also a few short comings.
For one thing there are multiple code blocks to determine mapping symbols, and
they all work slightly different, and neither fully correct. The first thing
this patch does is centralise the mapping symbols search into one function
mapping_symbol_for_insn. This function is then updated to perform a search in
a similar way as AArch64.
Their used to be a value has_mapping_symbols which was used to determine the
default disassembly for objects that have no mapping symbols. The problem with
the approach was that it was determining this value in the same loop that needed
it, which is why this field could take on the states -1, 0, 1 where -1 means
"don't know". However this means that until you actually find a mapping symbol
or reach the end of the disassembly glob, you don't know if you did the right
action or not, and if you didn't you can't correct it anymore.
This is why the two jump-reloc-veneers-* testcases end up disassembling some
insn as data when they shouldn't.
Out of order here refers to an object file where sections are not listed in a
monotonic increasing VMA order.
The ELF ABI for Arm [1] specifies the following for mapping symbols:
1) A text section must always have a corresponding mapping symbol at it's
start.
2) Data sections do not require any mapping symbols.
3) The range of a mapping symbol extends from the address it starts on up to
the next mapping symbol (exclusive) or section end (inclusive).
However there is no defined order between a symbol and it's corresponding
mapping symbol in the symbol table. This means that while in general we look
up for a corresponding mapping symbol, we have to make at least one check of
the symbol below the address being disassembled.
When disassembling different PCs within the same section, the search for mapping
symbol can be cached somewhat. We know that the mapping symbol corresponding to
the current PC is either the previous one used, or one at the same address as
the current PC.
However this optimization and mapping symbol search must stop as soon as we
reach the end or start of the section. Furthermore if we're only disassembling
a part of a section, the search is a allowed to search further than the current
chunk, but is not allowed to search past it (The mapping symbol if there, must
be at the same address, so in practice we usually stop at PC+4).
lastly, since only data sections don't require a mapping symbol the default
mapping type should be DATA and not INSN as previously defined, however if the
binary has had all its symbols stripped than this isn't very useful. To fix
this we determine the default based on the section flags. This will allow the
disassembler to be more useful on stripped binaries. If there is no section
than we assume you to be disassembling INSN.
[1] https://developer.arm.com/docs/ihi0044/latest/elf-for-the-arm-architecture-abi-2018q4-documentation#aaelf32-table4-7
binutils/ChangeLog:
* testsuite/binutils-all/arm/in-order-all.d: New test.
* testsuite/binutils-all/arm/in-order.d: New test.
* testsuite/binutils-all/arm/objdump.exp: Support .d tests.
* testsuite/binutils-all/arm/out-of-order-all.d: New test.
* testsuite/binutils-all/arm/out-of-order.T: New test.
* testsuite/binutils-all/arm/out-of-order.d: New test.
* testsuite/binutils-all/arm/out-of-order.s: New test.
ld/ChangeLog:
* testsuite/ld-arm/jump-reloc-veneers-cond-long.d: Update disassembly.
* testsuite/ld-arm/jump-reloc-veneers-long.d: Update disassembly.
opcodes/ChangeLog:
* arm-dis.c (struct arm_private_data): Remove has_mapping_symbols.
(mapping_symbol_for_insn): Implement new algorithm.
(print_insn): Remove duplicate code.
This is a followup to "binutils nm testsuite tidy". Since the perror
in binutils_assemble has been removed, we need to take more care in
failure paths.
The patch also fixed a number of .exp files that have multiple tests,
where an assembly failure returns from the .exp file. In most cases
it is nicer to attempt all tests.
* testsuite/binutils-all/ar.exp (unique_symbol): Don't run AR
if assembly fails.
* testsuite/binutils-all/arc/objdump.exp (check_assembly): If
objfile is empty, fail test.
* testsuite/binutils-all/arm/objdump.exp: Don't return if assembly
fails for a test, continue on to other tests.
* testsuite/binutils-all/bfin/objdump.exp: Likewise.
* testsuite/binutils-all/hppa/objdump.exp: Likewise.
* testsuite/binutils-all/m68k/objdump.exp: Likewise.
* testsuite/binutils-all/vax/objdump.exp: Likewise.
* testsuite/binutils-all/size.exp: Likewise.
* testsuite/binutils-all/nm.exp: Likewise. Move PR12753 test.
* testsuite/binutils-all/objcopy.exp: Don't perror on assembly fail.
* testsuite/binutils-all/objdump.exp: Report assembly fails.
* testsuite/binutils-all/ar.exp: Skip tests for Alpha target.
Skip bfdtest1 tests for tic30 target.
* testsuite/binutils-all/arm/objdump.exp: Skip for aout arm
target.
* testsuite/binutils-all/compress.exp: Expect some tests to fail
on the nds32.
* testsuite/binutils-all/copy-3.d: Skip for go32 targets.
* testsuite/binutils-all/copy-4.d: Skip for AIX and linuxecoff
targets.
* testsuite/binutils-all/nm.exp: Treat beos based targets as ELF
targets.
* testsuite/binutils-all/objcopy.exp: Only run reverse bytes tests
if the bintest.o file was created. Use the
get_standard_section_names proc to get the name of the data
section.
* testsuite/binutils-all/objdump.exp: Update regexps to allow for
RX section names.
* testsuite/binutils-all/readelf.exp: Use
get_standard_section_names proc to get the name of the data
section.
* testsuite/binutils-all/readelf.r: Allow for non standard text
section names.
* testsuite/binutils-all/readelf.s: Update regexps for tilepro.
* testsuite/binutils-all/size.exp: Allow for non standard section
names.
* testsuite/binutils-all/update-section.exp: Expect comapre 1vs4
to fail on mips targets.
* testsuite/lib/utils-lib.exp (default_binutils_run): Use
get_standard_section_names proc.
(run_dump_test): Likewise.
(proc get_standard_section_names): New proc.
2015-03-03 Jiong Wang <jiong.wang@arm.com>
opcode/
* arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
binutils/testsuite/
* binutils-all/arm/rvct_symbol.s: New testcase.
* binutils-all/arm/objdump.exp: Run it.
to PUSH/POP {reg}.
* binutils-all/arm/objdump.exp:
STMFD/LDMIA sp!, {reg} don't disassemble to PUSH/POP {reg} any longer.
* gas/arm/stm-ldm.d: STMFD/LDMIA sp!, {reg} don't disassemble to
PUSH/POP {reg} any longer. Some new test cases have been added as well.
* gas/arm/stm-ldm.s: Likewise.
opcodes/
* arm-dis.c (print_insn): init vars moved into private_data structure.
binutils/testsuite/
* binutils-all/arm/simple.s: Demo issue with objdump with
multiple input files
* binutils-all/arm/objdump.exp: added new ARM test case code
* binutils-all/arm/thumb2-cond.s: Use instructions instead of
.short.
gas/
* config/obj-elf.c (obj_elf_ident): Notify section change to the hook.
* config/tc-arm.c (make_mapping_symbol): New function, from
mapping_state. Save mapping symbols in the frag.
(insert_data_mapping_symbol): New.
(mapping_state): Use make_mapping_symbol, improve state transitions.
(mapping_state_2): New. Provide dummy definition.
(opcode_select): Do not call mapping_state.
(s_bss): Call md_elf_section_change_hook instead of mapping_state.
(output_inst): Update use of tc_frag_data.
(new_automatic_it_block): Call mapping_state before emitting the
IT instruction.
(md_assemble): Move mapping_state to just before outputting the
new instruction.
(arm_handle_align): Update use of tc_frag_data.
Call insert_data_mapping_symbol.
(arm_init_frag): Update use of tc_frag_data. Call
mapping_state_2.
(arm_elf_change_section): Always update the mapping symbol FSM state.
(check_mapping_symbols): New function.
(arm_adjust_symtab): Use check_mapping_symbols.
* config/tc-arm.h (struct arm_frag_type): New.
(TC_FRAG_TYPE): Change to struct arm_frag_type.
(TC_FRAG_INIT): Pass max_chars.
(arm_init_frag): Update prototype.
gas/testsuite/
* gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
* gas/arm/mapping.d: Adapted to new symbols generation.
* gas/arm/mapping2.d: New test case.
* gas/arm/mapping2.s: New file.
* gas/arm/mapping3.d: New test case.
* gas/arm/mapping3.s: New file.
* gas/arm/mapping4.d: New test case.
* gas/arm/mapping4.s: New file.
* gas/arm/mapshort-eabi.d: Adapted to new symbols generation.
* gas/elf/section2.e-armeabi: Adapted to new symbols generation.
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* elf32-arm.c (elf32_arm_compare_mapping): Compare first on vma,
then on type.
binutils/testsuite:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* binutils-all/ar.exp (long_filenames): Delete temporary files on
the host.
* binutils-all/arm/objdump.exp: Only check "which $OBJDUMP" if
host is local.
* binutils-all/objcopy.exp: Use ${srecfile} to get the name of the
srec file to be passed to binutils_run.
(objcopy_test_readelf): Use remote_exec.
* binutils-all/readelf.exp (readelf_find_size): Use remote_exec.
(readelf_test): Likewise.
(readelf_wi_test): Likewise.
* lib/utils-lib.exp (run_dump_test): Only check "which $binary" if
host is local. Use remote_exec. Use $tempfile not
tmpdir/bintest.o.
gas:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* as.c (main): Flush stderr before printing listings to ensure
consistent output order across platforms.
gas/testsuite:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* lib/gas-defs.exp (gas_version): Use remote_* functions instead
of exec.
(gas_host_run): New.
(gas_run): Use gas_host_run.
(gas_start): Likewise.
(run_dump_test): Likewise.
(objdump): Use gas_host_run.
(objdump_start_no_subdir): Likewise.
* lib/gas-dg.exp (gas-dg-test): Use "remote_file host delete".
* lib/run: Remove.
* gas/macros/macros.exp: Download app4b.s to host.
* gas/i386/i386.exp (gas_64_check): Use gas_host_run.
(gas_32_check): Likewise.
* gas/maxq10/maxq10.exp (gas_64_check): Likewise
(gas_32_check): Likewise.
* gas/maxq20/maxq20.exp (gas_64_check): Likewise
(gas_32_check): Likewise.
* gas/sparc/sparc.exp (gas_64_check): Likewise.
* gas/cfi/cfi.exp: Likewise.
* gas/elf/elf.exp (run_list_test): Likewise. Use temporary file
for readelf output in place of pipe.
* gas/all/gas.exp: Download incbin.dat to host.
(do_comment): Allow \r\r\n.
ld:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* ldlang.c (sort_sections_by_lma): Sort by internal id after lma
for stable sort.
ld/testsuite:
2007-08-28 Mark Shinwell <shinwell@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
* ld-elfcomm/elfcomm.exp: Use run_host_cmd. Only check "which
$CC" if host is local.
* ld-checks/checks.exp: Use run_host_cmd.
* ld-elf/exclude.exp: Likewise.
* ld-elf/elf.exp: Download merge.ld if host is remote.
* ld-elf/binutils.exp (binutils_test): Use remote_exec.
* ld-elf/tls_common.exp: Use run_host_cmd.
* lib/ld-lib.exp (ld_version): Only check "which $ld" if host is
local. Use remote_exec.
(run_host_cmd): New.
(run_host_cmd_yesno): New.
(default_ld_relocate): Use run_host_cmd_yesno.
(default_ld_link): Likewise.
(default_ld_simple_link): Use run_host_cmd.
(default_ld_compile): Only check "which $ccprog" if host is local.
Use remote_file and remote_exec.
(default_ld_assemble): Only check "which $as" if host is local.
Use run_host_cmd.
(default_ld_nm): Use remote_exec, remote_upload and remote_file.
(run_dump_test): Use remote_exec, remote_upload and remote_file.
Only check "which $binary" if host is local.
(run_ld_link_tests): Use remote_exec, remote_upload and
remote_file.
* ld-selective/selective.exp: Only check "which $CXX" if host is
local. Use remote_exec.
* ld-scripts/phdrs.exp: Only check "which $objdump" if host is
local. Use run_host_cmd.
* ld-scripts/phdrs2.exp: Likewise.
* ld-scripts/weak.exp: Likewise.
* ld-undefined/weak-undef.exp: Likewise.
* ld-scripts/crossref.exp: Only check "which $CC" if host is local.
Use run_host_cmd.
* ld-scripts/map-address.exp: Upload map_address.map if host is
remote.
* ld-srec/srec.exp (run_srec_tests): Use run_host_cmd. Only check
"which $CC" and "which $CXX" if host is local.
* ld-undefined/undefined.exp: Only check "which $CC" if host is
local. Use remote_file and run_host_cmd.
* config/default.exp: Use remote_exec to create tmpdir.
