in MN10300_OPERAND_SPLIT operands for how many bits
appear in the basic insn word. Add IMM32_HIGH24,
IMM32_HIGH24_LOWSHIFT8, IMM8E_SHIFT8.
(mn10300_opcodes): Use new operands as needed.
Support for everything in the basic instruction manual (yippie!)
operands. Update opcode table as appropriate.
(IMM32): Add MN10300_OPERAND_SPLIT flag.
(mn10300_opcodes): Fix single bit error in mov imm32,dn insn.
Cleaning up a little.
Attempting to insert most 32bit operands.
And a bug found by assembler testsuite.
operands (for indexed load/stores). Fix bitpos for DI
operand. Add SN8N_SHIFT8, IMM8_SHIFT8, and D16_SHIFT for the
few instructions that insert immediates/displacements in the
middle of the instruction. Add IMM8E for 8 bit immediate in
the extended part of an instruction.
(mn10300_operands): Use new opcodes as appropriate.
Opcode table changes so we can correctly insert everything except
32bit operands.
a data/address register that appears in register field 0
and register field 1.
(mn10300_opcodes): Use DN01 and AN01 for mov/cmp imm8,DN/AN
Hacking Matsushita again. Yippie!
field for movhu instruction.
Bug found by gas testsuite.
* v850-dis.c (disassemble): For V850_OPERAND_SIGNED operands,
cast value to "long" not "signed long" to keep hpux10
compiler quiet.
Found in an attempt to build the v850 on hpux10 with the HP
compiler.
Fix various typos. Add "PAREN" operand.
(MEM, MEM2): Define.
(mn10300_opcodes): Surround all memory addresses with "PAREN"
operands. Fix several typos.
Should parse all opcodes in the instruction specification, except the
"user extension instructions".
(mn10300_operands): Rough cut. Enough to parse "mov" instructions
at this time.
(mn10300_opcodes): Break opcode format out into its own field.
Update many operand fields to deal with signed vs unsigned
issues. Fix one or two typos in the "mov" instruction
opcode, mask and/or operand fields.
Checkpointing today's work. Matsushita.
