20 Commits

Author SHA1 Message Date
1124a4a7a7 * mips-dis.c (print_insn_arg): Handle ';' opcode completer.
(_print_insn_mips): Likewise.
        * vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
        completers.
1998-05-18 17:46:34 +00:00
92976c09d5 * Customer specs changed one R5900 COP2 instruction bit-pattern.
Wed Apr 15 10:30:07 1998   Frank Ch. Eigler  <fche@cygnus.com>

	* vu0.h: Specs changed for VCALLMSR bit pattern.
	* mips-dis.c: (print_insn_arg) Matching change.
1998-04-15 17:36:43 +00:00
98f699f653 * vu0.h (vcallms): Use 'O' for call target operand.
* mips-dis.c (print_insn_arg): Handle 'O'.
1998-03-22 19:56:37 +00:00
ffee80df9e * vu0.h: New file with cop2/vu0 instructions.
* mips-opc.c: Include vu0.h.
        * mips-dis.c (print_insn_arg): Handle new args 0-9, +, -, %, K, &,
        J, Q, X, and U.
        (print_insn_mips): Do not emit a tab after an instruction if the
        first arg is an instruction completer (&).  If the next arg is an
        escape character (%), then print the next arg verbatim.
        * Makefile.am (mips-opc.lo): Depend on vu0.h
1998-03-19 21:05:23 +00:00
88b38f0c3c * arm-dis.c (print_insn_{big,little}_arm): info->symbol changed
to *info->symbols.
	* mips-dis.c (print_insn_{big,little}_mips): Likewise.
	* tic30-dis.c (print_branch): Likewise.
start-sanitize-sky
	* mips-dis.c (print_insn_little_mips): Call dvp_info_mach_type.
	* dvp-dis.c (dvp_info_mach_type): New function.
	(print_insn_dvp): Call it.
	(print_vif): Return length of 4 if mpg or direct insn so following
	insns get properly disabled.
	* dvp-opc.c (vif_insn_len): New argument `pcpu'.  All callers updated.
end-sanitize-sky
1998-02-24 20:57:58 +00:00
fb1a826b06 * mips-dis.c (print_insn_arg): Do not prefix 'P' arguments with '$'. 1998-02-23 17:32:21 +00:00
33d3a00d42 (print_insn_little_mips): tweak dvp support. 1998-01-30 01:15:06 +00:00
3536b6a38b update copyright date 1998-01-28 22:03:51 +00:00
37130f1153 * dvp-dis.c, dvp-opc.c: New files.
* configure.in: Compile them if bfd_dvp_arch, as well as mips.
	* configure: Regenerate.
	* Makefile.am (ALL_MACHINES): Add dvp-{dis,opc}.lo.
	(dvp-dis.lo,dvp-opc.lo): Add rules for.
	(mips-dis.lo): Compile with @archdefs@.
	* Makefile.in: Regenerate.
	* disassemble.c: Define ARCH_mips ifdef ARCH_dvp.
	* mips-dis.c (print_insn_little_mips): Check for DVP insns.
plus delete old txvu stuff
1998-01-28 21:58:23 +00:00
83af233519 * mips-dis.c (_print_insn_mips): Set target_processor as appropriate.
Only recognize instructions for the current target_processor.
1998-01-28 04:51:22 +00:00
2ea116f49b * mips-dis.c (_print_insn_mips): Set bytes_per_chunk and
display_endian.
	(print_insn_mips16): Likewise.
1997-02-11 20:46:14 +00:00
0d52464ce4 * mips16-opc.c: Add new cases of exit instruction for
disassembler.
	* mips-dis.c (print_mips16_insn_arg): Display floating point
	registers in operands of exit instruction.  Print `$' before
	register names in operands of entry and exit instructions.
1997-02-05 16:14:26 +00:00
20d4301801 * mips-dis.c (print_insn_mips16): Set insn_info information.
(print_mips16_insn_arg): Likewise.
1997-01-28 21:49:18 +00:00
c4f19df2ef * mips-dis.c (print_insn_mips16): Better handling of an extend
opcode followed by an instruction which can not be extended.
1997-01-28 20:58:28 +00:00
8d67dc3077 Add support for mips16 (16 bit MIPS implementation):
* mips16-opc.c: New file.
	* mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
	(mips16_reg_names): New static array.
	(print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
	after seeing a 16 bit symbol.
	(print_insn_little_mips): Likewise.
	(print_insn_mips16): New static function.
	(print_mips16_insn_arg): New static function.
	* mips-opc.c: Add jalx instruction.
	* Makefile.in (mips16-opc.o): New target.
	* configure.in: Use mips16-opc.o for bfd_mips_arch.
	* configure: Rebuild.
1996-11-26 15:59:18 +00:00
30b1724cc8 * mips-dis.c (print_insn_arg): Print condition code registers as
$fccN.
1996-09-09 18:27:10 +00:00
547998d2c8 * mips-opc.c: Change div machine instruction to be z,s,t rather
than s,t.  Change div macro to be d,v,t rather than d,s,t.
	Likewise for divu, ddiv, ddivu.  Added z,s,t case for drem, dremu,
	rem and remu which generates only the corresponding div
	instruction.  This is for compatibility with the MIPS assembler,
	which only generates the simple machine instruction when an
	explicit destination of $0 is used.
	* mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
1993-09-02 17:14:10 +00:00
fde326fbc9 * mips-dis.c: Updated to account for name changes in new version
of opcode/mips.h.
	* Makefile.in: Added header file dependencies.
1993-07-07 17:37:11 +00:00
5d0734a7d7 provide a new interface (using read_memory_func) to call the disassemblers
which copes with errors in a plausible way
1993-03-31 21:43:25 +00:00
d0ba1cea30 Thu Jan 7 13:15:17 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
* mips-dis.c: New file, from gdb/mips-pinsn.c.
	* Makefile.in (DIS_LIBS): Added mips-dis.o.
	(CFILES): Added mips-dis.c.
1993-01-07 18:21:29 +00:00