12 Commits

Author SHA1 Message Date
a6743a5420 opcodes error messages
Another patch aimed at making binutils comply with the GNU coding
standard.  The generated files require
https://sourceware.org/ml/cgen/2018-q1/msg00004.html

cpu/
	* frv.opc: Include opintl.h.
	(add_next_to_vliw): Use opcodes_error_handler to print error.
	Standardize error message.
	(fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
opcodes/
	* sysdep.h (opcodes_error_handler): Define.
	(_bfd_error_handler): Declare.
	* Makefile.am: Remove stray #.
	* opc2c.c (main): Remove bogus -l arg handling.  Print "DO NOT
	EDIT" comment.
	* aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
	* d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
	* riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
	opcodes_error_handler to print errors.  Standardize error messages.
	* msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
	and include opintl.h.
	* nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
	* i386-gen.c: Standardize error messages.
	* msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
	* Makefile.in: Regenerate.
	* epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
	* epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
	* fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
	* frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
	* iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
	* lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
	* m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
	* m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
	* mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
	* mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
	* or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
2018-03-03 11:34:26 +10:30
219d1afa89 Update year range in copyright notice of binutils files 2018-01-03 17:49:56 +10:30
4162bb66c6 Mark generated cgen files read-only
* cgen.sh: Mark generated files read-only.
	* epiphany-asm.c: Regenerate.
	* epiphany-desc.c: Regenerate.
	* epiphany-desc.h: Regenerate.
	* epiphany-dis.c: Regenerate.
	* epiphany-ibld.c: Regenerate.
	* epiphany-opc.c: Regenerate.
	* epiphany-opc.h: Regenerate.
	* fr30-asm.c: Regenerate.
	* fr30-desc.c: Regenerate.
	* fr30-desc.h: Regenerate.
	* fr30-dis.c: Regenerate.
	* fr30-ibld.c: Regenerate.
	* fr30-opc.c: Regenerate.
	* fr30-opc.h: Regenerate.
	* frv-asm.c: Regenerate.
	* frv-desc.c: Regenerate.
	* frv-desc.h: Regenerate.
	* frv-dis.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* frv-opc.c: Regenerate.
	* frv-opc.h: Regenerate.
	* ip2k-asm.c: Regenerate.
	* ip2k-desc.c: Regenerate.
	* ip2k-desc.h: Regenerate.
	* ip2k-dis.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* ip2k-opc.c: Regenerate.
	* ip2k-opc.h: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-desc.c: Regenerate.
	* iq2000-desc.h: Regenerate.
	* iq2000-dis.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* iq2000-opc.c: Regenerate.
	* iq2000-opc.h: Regenerate.
	* lm32-asm.c: Regenerate.
	* lm32-desc.c: Regenerate.
	* lm32-desc.h: Regenerate.
	* lm32-dis.c: Regenerate.
	* lm32-ibld.c: Regenerate.
	* lm32-opc.c: Regenerate.
	* lm32-opc.h: Regenerate.
	* lm32-opinst.c: Regenerate.
	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Regenerate.
	* m32c-desc.h: Regenerate.
	* m32c-dis.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.
	* m32r-asm.c: Regenerate.
	* m32r-desc.c: Regenerate.
	* m32r-desc.h: Regenerate.
	* m32r-dis.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* m32r-opc.c: Regenerate.
	* m32r-opc.h: Regenerate.
	* m32r-opinst.c: Regenerate.
	* mep-asm.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mep-desc.h: Regenerate.
	* mep-dis.c: Regenerate.
	* mep-ibld.c: Regenerate.
	* mep-opc.c: Regenerate.
	* mep-opc.h: Regenerate.
	* mt-asm.c: Regenerate.
	* mt-desc.c: Regenerate.
	* mt-desc.h: Regenerate.
	* mt-dis.c: Regenerate.
	* mt-ibld.c: Regenerate.
	* mt-opc.c: Regenerate.
	* mt-opc.h: Regenerate.
	* or1k-asm.c: Regenerate.
	* or1k-desc.c: Regenerate.
	* or1k-desc.h: Regenerate.
	* or1k-dis.c: Regenerate.
	* or1k-ibld.c: Regenerate.
	* or1k-opc.c: Regenerate.
	* or1k-opc.h: Regenerate.
	* or1k-opinst.c: Regenerate.
	* xc16x-asm.c: Regenerate.
	* xc16x-desc.c: Regenerate.
	* xc16x-desc.h: Regenerate.
	* xc16x-dis.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xc16x-opc.c: Regenerate.
	* xc16x-opc.h: Regenerate.
	* xstormy16-asm.c: Regenerate.
	* xstormy16-desc.c: Regenerate.
	* xstormy16-desc.h: Regenerate.
	* xstormy16-dis.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.
	* xstormy16-opc.c: Regenerate.
	* xstormy16-opc.h: Regenerate.
2017-07-11 19:18:06 +09:30
4274208406 Regen cgen files
* epiphany-desc.c: Regenerate.
	* fr30-desc.c: Regenerate.
	* frv-desc.c: Regenerate.
	* ip2k-desc.c: Regenerate.
	* iq2000-desc.c: Regenerate.
	* lm32-desc.c: Regenerate.
	* m32c-desc.c: Regenerate.
	* m32r-desc.c: Regenerate.
	* mep-desc.c: Regenerate.
	* mt-desc.c: Regenerate.
	* or1k-desc.c: Regenerate.
	* xc16x-desc.c: Regenerate.
	* xstormy16-desc.c: Regenerate.
2017-04-13 21:38:04 +09:30
2571583aed Update year range in copyright notice of all files. 2017-01-02 14:08:56 +10:30
6f2750feaf Copyright update for binutils 2016-01-01 23:00:01 +10:30
43e65147c0 Remove trailing spaces in opcodes 2015-08-12 04:45:07 -07:00
b90efa5b79 ChangeLog rotatation and copyright year update 2015-01-02 00:53:45 +10:30
018dc9bedf or1k: add missing l.msync, l.psync and l.psync instructions.
Even though the opcodes were defined for these instructions,
the actual instruction definitions were lacking.

cpu/
	* or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.

opcodes/
	* or1k-desc.c, * or1k-desc.h, * or1k-opc.c, * or1k-opc.h,
	* or1k-opinst.c: Regenerate.
2014-07-20 20:26:09 +03:00
c151b1c645 Whitespace fixes for cpu/or1k.opc
* or1k.opc: Whitespace fixes.
2014-06-12 12:30:57 +09:30
999b995ddc or1k: add support for l.swa/l.lwa atomic instructions
This adds support for the load-link/store-conditional
l.lwa/l.swa atomic instructions.
The support is added in such way, that the cpu description not
only describes the mnemonics, but also the functionality.

A couple of fixes to typos in nearby/related code are also snuck
into this.

cpu/
	* or1korbis.cpu (h-atomic-reserve): New hardware.
	(h-atomic-address): Likewise.
	(insn-opcode): Add opcodes for LWA and SWA.
	(atomic-reserve): New operand.
	(atomic-address): Likewise.
	(l-lwa, l-swa): New instructions.
	(l-lbs): Fix typo in comment.
	(store-insn): Clear atomic reserve on store to atomic-address.
	Fix register names in fmt field.

opcodes/
	* or1k-desc.c: Regenerated.
	* or1k-desc.h: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opc.h: Likewise.
	* or1k-opinst.c: Likewise.
2014-05-08 09:02:50 +03:00
73589c9dbd Remove support for the (deprecated) openrisc and or32 configurations and replace
with support for the new or1k configuration.
2014-04-22 15:57:47 +01:00