196 Commits

Author SHA1 Message Date
c217e3d54e sim: replace -I$srcroot/bfd include with -I$srcroot
Clean up includes a bit by making ports include bfd/ headers
explicitly.  This matches other projects, and makes it more clear
where these headers are coming from.
2023-01-01 23:17:07 -05:00
883be19774 sim: cpu: change default init to handle all cpus
All the runtimes were only initializing a single CPU.  When SMP is
enabled, things quickly crash as none of the other CPU structs are
setup.  Change the default from 0 to the compile time value.
2022-12-25 02:10:46 -05:00
697e27f0ee sim: mips: switch from SIM_ADDR to address_word
The latter type matches the address size configured for this sim.

Also take the opportunity to simplify printf logic by leveraging
PRI* macros.
2022-12-22 20:10:13 -05:00
8e9408080b sim: mips: invert sim_cpu storage 2022-12-21 00:00:01 -05:00
ee1cffd388 sim: common: change sim_{fetch,store}_register helpers to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-11-02 20:31:10 +05:45
5bab16fdf1 sim: reg: constify store helper
These functions only read from memory, so mark the pointer as const.
2022-10-31 21:24:39 +05:45
5b94c38081 sim: common: change sim_read & sim_write to use void* buffers
When reading/writing arbitrary data to the system's memory, the unsigned
char pointer type doesn't make that much sense.  Switch it to void so we
align a bit with standard C library read/write functions, and to avoid
having to sprinkle casts everywhere.
2022-10-31 21:24:39 +05:45
845cbaa9ff sim: remove use of PTR
PTR will soon disappear from ansidecl.h.  Remove uses in sim.  Where
a PTR cast is used in assignment or function args to a void* I've
simply removed the unnecessary (in C) cast rather than replacing with
(void *).
2022-05-13 14:32:54 +09:30
06c441ccef sim: mips: Add simulator support for mips32r6/mips64r6
2022-02-01  Ali Lown  <ali.lown@imgtec.com>
	    Andrew Bennett  <andrew.bennett@imgtec.com>
	    Dragan Mladjenovic  <dragan.mladjenovic@rt-rk.com>
	    Faraz Shahbazker  <fshahbazker@wavecomp.com>

sim/common/ChangeLog:
	* sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21,
	EXTEND26): New macros.

sim/mips/ChangeLog:
	* Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen.
	* configure: Regenerate.
	* configure.ac: Support mipsisa32r6 and mipsisa64r6.
	(sim_engine_run): Pick simulator model from processor specified
	in e_flags.
	* cp1.c (value_fpr): Handle fmt_dc32.
	(fp_unary, fp_binary): Zero initialize locals.
	(update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac,
	fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub):
	New functions.
	(sim_fpu_class_mips_mapping): New.
	* cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define.
	* interp.c (MIPSR6_P): New.
	(load_word): Allow unaligned memory access for MIPSR6.
	* micromips.igen (sc, scd): Adapt to new do_sc* helper signature.
	* mips.igen: Add *r6 models.
	(signal_if_cti, forbiddenslot32): New helpers.
	(delayslot32): Use signal_if_cti.
	(do_sc, do_scd); Add store_ll_bit parameter.
	(sc, scd): Adapt to previous change.
	(nal, beq, bal): New definitions for *r6.
	(sll): Split nop and ssnop cases into ...
	(nop, ssnop): New definitions.
	(loadstore_ea): Use the 32-bit compatibility adressing.
	(cache): Split logic into ...
	(do_cache): New helper.
	(check_fpu): Select IEEE 754-2008 mode for R6.
	(not_word_value, unpredictable, check_mt_hilo, check_mf_hilo,
	check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add,
	li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd,
	daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra,
	dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr,
	jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror,
	rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav,
	srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt,
	tltu, tne, xor, xori, check_fmt_p, do_load_double,
	do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT,
	cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1,
	dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT,
	mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT,
	sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f,
	bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp,
	tlbr, tlbwi, tlbwr): Enable on *r6 models.
	* mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu,
	dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr,
	wsbh): Likewise.
	* mips3264r6.igen: New file.
	* sim-main.h (FP_formats): Add fmt_dc32.
	(FORBIDDEN_SLOT): New macros.
	(simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines.
	(fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina,
	fp_maxa, fp_fmadd, fp_fmsub): New declarations.
	(R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA,
	MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping
	previous declarations.

sim/testsuite/mips/ChangeLog:
	* basic.exp: Add r6-*.s tests.
	(run_r6_removed_test): New function.
	(run_endian_tests): New function.
	* hilo-hazard-3.s: Skip for mips*r6.
	* r2-fpu.s: New test.
	* r6-64.s: New test.
	* r6-branch.s: New test.
	* r6-forbidden.s: New test.
	* r6-fpu.s: New test.
	* r6-llsc-dp.s: New test.
	* r6-llsc-wp.s: New test.
	* r6-removed.csv: New test.
	* r6-removed.s: New test.
	* r6.s: New test.
	* utils-r6.inc: New inc.
2022-02-04 19:37:26 -05:00
b331e677d7 sim: mips: migrate to standard uintXX_t types
Move off the sim-specific unsignedXX types and to the standard uintXX_t
types that C11 provides.
2022-01-06 01:17:38 -05:00
d3eb0aa287 sim: mips: clean up bad style/whitespace
This doesn't fix all the problems, but grabs a bunch of the more
obvious ones.
2022-01-01 13:26:34 -05:00
c0f9d65827 sim: mips: avoid _ namespace
Some C libraries export _P symbols in their headers (like older
newlib and its ctype.h), so use P_ instead to avoid conflicts.
2021-11-25 23:48:45 -05:00
e8f20a28b1 sim: split program path out of argv vector
We use the program argv to both find the program to run (argv[0]) and
to hold the arguments to the program.  Most of the time this is fine,
but if we want to let programs specify argv[0] independently (which is
possible in standard *NIX programs), this double duty doesn't work.

So let's split the path to the program to run out into a separate
field by itself.  This simplifies the various sim_open funcs too.

By itself, this code is more of a logical cleanup than something that
is super useful.  But it will open up customization of argv[0] in a
follow up commit.  Split the changes to make it easier to review.
2021-11-15 02:53:29 -05:00
1fef66b0dc sim: split sim-signal.h include out
The sim-basics.h is too big and includes too many things.  This leads
to some arch's sim-main.h having circular loop issues with defs, and
makes it hard to separate out common objects from arch-specific defs.
By splitting up sim-basics.h and killing off sim-main.h, it'll make
it easier to separate out the two.
2021-06-18 00:50:14 -04:00
b80d447580 sim: mips: add printf attribute to trace func
This helps catch format errors in code, although they're all clean
at this point already.
2021-06-16 01:56:22 -04:00
6828a30253 sim: mips: rework dynamic printf logic to avoid compiler warnings
The compiler doesn't like passing non-constant strings to printf
functions, so tweak the code to always pass one in.  This code is
a little more verbose, but it's probably the same performance.

The macro usage is a bit ugly, but maybe less than copying &
pasting the extended conditional format logic.
2021-06-16 01:55:31 -04:00
dae666c968 sim: mips: fix format warnings when setting up memory
The majority of these inputs are not long's, so don't use %lx.
This fixes compiler warnings about type mismatches.
2021-06-16 00:50:56 -04:00
8ea881d9e3 sim: mips: fix build w/out dv-sockser
Make sure we don't fail to build when dv-socker is unavailable.
2021-05-29 15:29:54 -04:00
168671c14c sim: mips: Add shadow mappings for 32-bit memory address space
32-bit MIPS programs run on the 64-bit simulator model in 64-bit
sign-extended space. The mapping from 64-bit sign-extended addresses to
32-bit addresses was removed by commit
26f8bf63bf36f9062a5cc1afacf71462a4abe0c8, breaking the 64-bit simulator
model. Add shadow mappings from 64-bit sign extended address space to
32-bit address spaces, in lieu of the AddressTranslation function.

2021-05-04  Faraz Shahbazker  <fshahbazker@wavecomp.com>

sim/mips/ChangeLog:
	* interp.c (sim_open): Add shadow mappings from 32-bit
	address space to 64-bit sign-extended address space.
2021-05-22 11:32:35 +05:30
b312488f10 sim: mips: Only truncate sign extension bits for 32-bit target models
64-bit BFD for MIPS applies a standard sign extension on all addresses
assuming 64-bit target.  These bits are required for 64-bit and can only
be safely truncated for 32-bit target models. This partially reverts commit
b36d953bced0a4fecdde1823abac70ed7038ee95

The sign-extension logic modeled by BFD is an integral part of the
MIPS64 architecture spec. It appears in the virtual address map, where
sign extension allows for 32-bit compatibility segments [1] with 64-bit
addressing. Truncating these addresses prematurely (commit
models (-DWITH_TARGET_WORD_BITSIZE=64).

In the ISA itself, direct addressing (Load-Upper-Immediate) and indirect
addressing (Load-Word) both automatically sign-extend their results. These
instructions regenerate the sign-extended addresses even if we don't start
with one (see pr gdb/19447).

Moreover, some instructions like ADD*/SUB* have unpredictable behaviour when
an operand is not correctly sign extended [3]. This affects PC-relative
addressing in particular, so arithmetic on the link-address generated in the
return address register by a jump-and-link is no longer possible, neither is
the use of the PC-relative addressing instructions provided by MIPSR6.

[1] "MIPS64 Architecture for Programmers Volume III: The MIPS64
    Privileged Resource Architecture", Document Number: MD00091,
    Revision 6.02, December 10, 2015, Section 4.3 "Virtual Address
    Spaces", pp. 29-31
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00091-2B-MIPS64PRA-AFP-06.03.pdf

[2] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Reference Manual", Document Number: MD00087,
    Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
    List of Instructions", pp. 321
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

[3] "MIPS64 Architecture for Programmers Volume II-A: The MIPS64
    Instruction Set Reference Manual", Document Number: MD00087,
    Revision 6.06, December 15, 2016, Section 3.2 "Alphabetical
    List of Instructions", pp. 56
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00087-2B-MIPS64BIS-AFP-6.06.pdf

2021-04-23  Faraz Shahbazker  <fshahbazker@wavecomp.com>

sim/mips/ChangeLog:
	* interp.c (sim_create_inferior): Only truncate sign extension
	bits for 32-bit target models
.
2021-05-22 11:30:57 +05:30
8ea7241cf3 sim: mips: invert sim_state storage 2021-05-17 01:00:08 -04:00
6df01ab8ab sim: switch config.h usage to defs.h
The defs.h header will take care of including the various config.h
headers.  For now, it's just config.h, but we'll add more when we
integrate gnulib in.

This header should be used instead of config.h, and should be the
first include in every .c file.  We won't rely on the old behavior
where we expected files to include the port's sim-main.h which then
includes the common sim-basics.h which then includes config.h.  We
have a ton of code that includes things before sim-main.h, and it
sometimes needs to be that way.  Creating a dedicated header avoids
the ordering mess and implicit inclusion that shows up otherwise.
2021-05-16 22:38:41 -04:00
df68e12b3b sim: create header namespace
The gdb/callback.h & gdb/remote-sim.h headers have nothing to do with
gdb and are really definitions for the libsim API under the sim/ tree.
While gdb uses those headers as a client, it's not specific to it.  So
create a new sim/ namespace and move the headers there.
2021-05-14 00:41:05 -04:00
d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code
Every arch handles this the same way, so move it to the common code.
This will also make unifying the sim_cpu structure easier.
2021-04-12 00:14:32 -04:00
5c6f091ae0 sim: mips: Add handlers to simulator monitor for unlink, lseek and stat
sim/mips/ChangeLog
	* interp.c (sim_monitor): Add switch entries for unlink (13),
	lseek (14), and stat (15).

Derived from patch authored by Steve Ellcey <sellcey@mips.com>
2021-04-04 16:44:21 +05:30
4c0d76b9c4 sim: watchpoints: use common sim_pc_get
Few arches implement STATE_WATCHPOINTS()->pc while all of them implement
sim_pc_get.  Lets switch the sim-watch core for monitoring pc events to
the sim_pc_get API so this module works for all ports, and then we can
delete this old back channel of snooping in the port's cpu state -- the
code needs the pointer to the pc storage so that it can read out bytes
and compare them to the watchrange.

This also fixes the logic on multi-cpu sims by removing the limitation
of only being able to watch CPU0's state.
2021-02-06 12:12:51 -05:00
d4e3adda12 sim: watchpoints: change sizeof_pc to sizeof(sim_cia)
Existing ports already have sizeof_pc set to the same size as sim_cia,
so simply make that part of the core code.  We already assume this in
places by way of sim_pc_{get,set}, and this is how it's documented in
the sim-base.h API.

There is code to allow sims to pick different register word sizes from
address sizes, but most ports use the defaults for both (32-bits), and
the few that support multiple register sizes never change the address
size (so address defaults to register).  I can't think of any machine
where the register hardware size would be larger than the address word
size either.  We have ABIs that behave that way (e.g. x32), but the
hardware is still equivalent register sized.
2021-01-30 10:14:21 -05:00
68ed285428 sim: clean up C11 header includes
Since we require C11 now, we can assume many headers exist, and
clean up all of the conditional includes.  It's not like any of
this code actually accounted for the headers not existing, just
whether we could include them.

The strings.h cleanup is a little nuanced: it isn't in C11, but
every use of it in the codebase will include strings.h only if
string.h doesn't exist.  Since we now assume the C11 string.h
exists, we'll never include strings.h, so we can delete it.
2021-01-11 08:05:54 -05:00
b36d953bce sim: mips: workaround 32-bit addr sign extensions
The mips bfd will sign extend 32-bit addresses into 64-bit values,
so if the entry happens to be 0x80000000 or higher, it is turned to
0xffffffff80000000 which points to memory that doesn't exist.

This wasn't an issue until commit 26f8bf63bf36f9062a5cc1afacf71462a
as all addresses were automatically truncated there in the translate
function to 32-bits.  When we cleaned up that code, the full 64-bits
were checked leading to many test failures for mips-sde-elf targets
and such.
2016-01-12 01:42:22 -05:00
2e3d4f4d5d sim: sim_{create_inferior,open,parse_args}: constify argv/env slightly
2016-01-03  Mike Frysinger  <vapier@gentoo.org>

	* sim-options.c (sim_parse_args): Mark argv array const.
	* sim-options.h (sim_parse_args): Likewise.
2016-01-06 21:48:59 -05:00
77cf2ef5dc sim: parse_args: display getopt error ourselves
Fix a long standing todo where we let getopt write directly to stderr
when an invalid option is passed.  Use the sim io funcs instead as they
go through the filtered callbacks that gdb wants.
2016-01-03 22:07:39 -05:00
e1211e5506 sim: arm/d10v/h8300/m68hc11/microblaze/mips/mn10300/moxie/sh/v850: convert to common sim_{fetch,store}_register 2015-12-30 03:30:25 -05:00
26f8bf63bf sim: mips: delete mmu stubs to move to common sim_{read,write}
The only unique thing about mip's sim_{read,write} helpers is the call to
address_translation on the incoming address.  When we look closer at that
function though, we see it's just a stub that maps physical to virtual,
and the cache/return values are hardcoded.  If we delete this function,
we can then collapse all the callers and drop the custom sim_{read,write}
logic entirely.

Some day we might want to add MMU support, but when we do, we'll want to
have the common layers handle things so all targets benefit.
2015-12-26 11:50:59 -05:00
3cabaf66d6 sim: delete SIM_HAVE_FLATMEM support
No target has used this, and it's a cheap hack in place in using the
common memory module.  We want everyone using that though, so drop
support for flatmem entirely.
2015-12-24 19:52:13 -05:00
6e4f085c7f sim: sim-close: unify sim_close logic
Other than the nice advantage of all sims having to declare one fewer
common function, this also fixes leakage in pretty much every sim.
Many were not freeing any resources, and a few were inconsistent as
to the ones they did.  Now we have a single module that takes care of
all the logic for us.

Most of the non-cgen based ones could be deleted outright.  The cgen
ones required adding a callback to the arch-specific cleanup func.
The few that still have close callbacks are to manage their internal
state.

We do not convert erc32, m32c, ppc, rl78, or rx as they do not use
the common sim core.
2015-11-15 02:30:19 -05:00
8e394ffc7a [PATCH] Add micromips support to the MIPS simulator
2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 	      Ali Lown  <ali.lown@imgtec.com>

	sim/common/
	* sim-bits.h (EXTEND6): New macro.
	(EXTEND12): New macro.
	(EXTEND25): New macro.

	sim/mips/
	* Makefile.in (tmp-micromips): New rule.
	(tmp-mach-multi): Add support for micromips.
	* configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
	that works for both mips64 and micromips64.
	(mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
	micromips32.
	Add build support for micromips.
	* dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
	do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
	do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
	do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
	do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
	do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
	do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
	do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
	Refactored instruction code to use these functions.
	* dsp2.igen: Refactored instruction code to use the new functions.
	* interp.c (decode_coproc): Refactored to work with any instruction
	encoding.
	(isa_mode): New variable
	(RSVD_INSTRUCTION): Changed to 0x00000039.
	* m16.igen (BREAK16): Refactored instruction to use do_break16.
	(JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
	* micromips.dc: New file.
	* micromips.igen: New file.
	* micromips16.dc: New file.
	* micromipsdsp.igen: New file.
	* micromipsrun.c: New file.
	* mips.igen (do_swc1): Changed to work with any instruction encoding.
	(do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
	do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo
	do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu
	do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu
	do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub
	do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo
	do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc, do_scd
	do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu, do_tgeu, do_tlt
	do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt, do_add_fmt
	do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1, do_cvt_d_fmt
	do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl, do_cvt_s_pu
	do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt, do_luxc1_32
	do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b, do_mov_fmt, do_movtf
	do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt, do_mtc1b, do_mul_fmt
	do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps, do_plu_ps, do_pul_ps
	do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt, do_prefx, do_sdc1
	do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt, do_swc1, do_swxc1
	do_trunc_fmt): New functions, refactored from existing instructions.
	Refactored instruction code to use these functions.
	(RSVD): Changed to use new reserved instruction.
	(loadstore_ea, not_word_value, unpredictable, check_mt_hilo, check_mf_hilo,
	check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32, do_sdc1, do_suxc1_32,
	check_fmt_p, check_fpu, do_load_double, do_store_double):  Added micromips32
	and micromips64 models.
	Added include for micromips.igen and micromipsdsp.igen
	Add micromips32 and micromips64 models.
	(DecodeCoproc): Updated to use new macro definition.
	* mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
	do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
	do_seb, do_seh do_rdhwr, do_wsbh): New functions.
	Refactored instruction code to use these functions.
	* sim-main.h (CP0_operation): New enum.
	(DecodeCoproc): Updated macro.
	(IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
	MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16, MICROMIPS_DELAYSLOT_SIZE_32,
	ISA_MODE_MIPS32 and ISA_MODE_MICROMIPS): New defines.
	(sim_state): Add isa_mode field.

	sim/testsuite/sim/mips/
       * basic.exp (run_micromips_test, run_sim_tests): New functions
	Add support for micromips tests.
	* hilo-hazard-4.s: New file.
	* testutils.inc (_dowrite): Changed reserved instruction encoding.
	(writemsg): Moved the la and li instructions before the data they are
	assigned to, which prevents a bug where MIPS32 relocations are used instead
	of micromips relocations when building for micromips.
2015-09-25 15:52:18 +01:00
29bc024d07 sim: mips: switch to common WITH_TRACE_ANY_P
We want to add new common trace helpers including "TRACE", so change the
mips one to the new WITH_TRACE_ANY_P macro since they do the same thing.
2015-06-12 06:28:17 -04:00
034685f9ce sim: replace CIA_{GET,SET} with CPU_PC_{GET,SET}
The CIA_{GET,SET} macros serve the same function as CPU_PC_{GET,SET}
except the latter adds a layer of indirection via the sim state.  This
lets models set up different functions at runtime and doesn't reach so
directly into the arch-specific cpu state.

It also doesn't make sense to have two sets of macros that do exactly
the same thing, so lets standardize on the one that gets us more.
2015-04-17 02:44:30 -04:00
7bebb329bb sim: mips: convert to sim-cpu
Make cpu allocation fully dynamic so we can leverage the common
sim-cpu and its APIs.
2015-04-13 02:09:55 -04:00
8ac57fbde4 sim: mips: fix prototype warnings
Convert a bunch of old style prototypes and tweak various casts
to match the function signatures.
2015-04-13 02:01:11 -04:00
05f53ed611 sim: m68hc11/mips/mn10300/v850: add basic sim_pc_get
The previous profile change broke these sims that use sim-profile but
not sim-cpu (due to missing model support).  Add simple funcs until we
can convert these over properly.
2015-03-24 02:43:42 -04:00
bdca5ee4bc remove PARAMS from sim
This removes the last uses of PARAMS from sim.

2014-01-06  Tom Tromey  <tromey@redhat.com>

	* README-HACKING: Don't use PARAMS.
	* arm/wrapper.c: Don't use PARAMS.
	* bfin/sim-main.h: Don't use PARAMS.
	* common/callback.c: Don't use PARAMS.
	* common/cgen-trace.c: Don't use PARAMS.
	* common/run-sim.h: Don't use PARAMS.
	* common/run.c: Don't use PARAMS.
	* common/sim-base.h: Don't use PARAMS.
	* common/sim-load.c: Don't use PARAMS.
	* common/sim-options.h: Don't use PARAMS.
	* common/sim-trace.c: Don't use PARAMS.
	* common/sim-trace.h: Don't use PARAMS.
	* common/sim-utils.h: Don't use PARAMS.
	* cr16/cr16_sim.h: Don't use PARAMS.
	* cr16/gencode.c: Don't use PARAMS.
	* cr16/interp.c: Don't use PARAMS.
	* cr16/simops.c: Don't use PARAMS.
	* d10v/d10v_sim.h: Don't use PARAMS.
	* d10v/gencode.c: Don't use PARAMS.
	* d10v/interp.c: Don't use PARAMS.
	* d10v/simops.c: Don't use PARAMS.
	* erc32/erc32.c: Don't use PARAMS.
	* erc32/exec.c: Don't use PARAMS.
	* erc32/float.c: Don't use PARAMS.
	* erc32/func.c: Don't use PARAMS.
	* erc32/sis.c: Don't use PARAMS.
	* erc32/sis.h: Don't use PARAMS.
	* mips/interp.c: Don't use PARAMS.
	* mips/sim-main.h: Don't use PARAMS.
	* sh/interp.c: Don't use PARAMS.
	* v850/sim-main.h: Don't use PARAMS.
	* v850/v850_sim.h: Don't use PARAMS.
2014-01-07 09:17:05 -07:00
a6ff997ce8 PR 14072
* wrapper.c: Include config.h before system header files.

	* callback.c: Include config.h before system header files.
	* cgen-trace.c: Likewise.
	* cgen-utils.c: Likewise.
	* gentmap.c: Likewise.

	* sim-if.c: Include config.h before system header files.

	* compile.c: Include config.h before system header files.
	* sim-main.h: Likewise.

	* gdb-if.c: Include config.h before system header files.
	* load.c: Likewise.
	* syscalls.c: Likewise.
	* trace.c: Likewise.

	* interp.c: Include config.h before system header files.
2012-05-19 16:46:16 +00:00
2419798b80 sim: start a unified sim_do_command
Since sim_do_command for many people simply calls sim_args_command, start
a unified version of it.  For people who handle their own options, they
could switch to this by using sim_add_option_table instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-05 19:06:38 +00:00
d79fe0d643 sim: punt zfree()
The sim keeps track of which allocations are zero-ed internally (via
zalloc) and then calls a helper "zfree" function rather than "free".
But this "zfree" function simply calls "free" itself.  Since I can
see no point in this and it is simply useless overhead, punt it.

The only real change is in hw-alloc.c where we remove the zalloc_p
tracking, and sim-utils.c where zfree is delete.  The rest of the
changes are a simple `sed` from "zfree" to "free".

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-14 05:14:28 +00:00
5558e7e691 sim: constify sim_write source buffer (part 2)
As pointed out by Sandra Loosemore, a bunch of targets define sim_write
themselves instead of using the common/ code.  So constify them too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-04-14 07:38:06 +00:00
35aafff4ac Cannot build mips simulator on darwin.
Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
        * interp.c: Don't include sysdep.h
2010-01-18 03:30:28 +00:00
2525df0347 * interp.c (options enum): Add OPTION_INFO_MEMORY.
(display_mem_info): New static variable.
  (mips_option_handler): Handle OPTION_INFO_MEMORY.
  (mips_options): Add info-memory and memory-info.
  (sim_open): After processing the command line and board specification, check display_mem_info.
  If it is set then call the real handler for the --memory-info command line switch.
2007-09-04 14:33:18 +00:00
f8df4c7704 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
after each call to sim_io_write.
2007-02-19 17:46:53 +00:00
07802d9880 (ColdReset): Set CP0 Config0 to reflect the address size supported
by this simulator.
	(decode_coproc): Recognise additional CP0 Config registers
	correctly.
2007-02-19 17:34:18 +00:00