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sim: frv: fix ambiguous else compiler warnings
Add explicit braces to if bodies when the body is another if/else to fix a bunch of compiler warnings.
This commit is contained in:
@ -1,3 +1,9 @@
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2021-06-27 Mike Frysinger <vapier@gentoo.org>
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* frv.c (frvbf_shift_left_arith_saturate): Add braces to if statement.
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* profile-fr500.c (adjust_float_register_busy): Likewise.
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* profile-fr550.c (adjust_float_register_busy): Likewise.
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2021-06-22 Mike Frysinger <vapier@gentoo.org>
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2021-06-22 Mike Frysinger <vapier@gentoo.org>
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* configure: Regenerate.
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* configure: Regenerate.
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@ -1182,10 +1182,12 @@ frvbf_shift_left_arith_saturate (SIM_CPU *current_cpu, SI arg1, SI arg2)
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/* Signed shift by 31 or greater saturates by definition. */
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/* Signed shift by 31 or greater saturates by definition. */
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if (arg2 >= 31)
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if (arg2 >= 31)
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{
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if (arg1 > 0)
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if (arg1 > 0)
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return (SI) 0x7fffffff;
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return (SI) 0x7fffffff;
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else
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else
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return (SI) 0x80000000;
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return (SI) 0x80000000;
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}
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/* OK, arg2 is between 1 and 31. */
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/* OK, arg2 is between 1 and 31. */
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neg_arg1 = (arg1 < 0);
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neg_arg1 = (arg1 < 0);
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@ -158,23 +158,29 @@ adjust_float_register_busy (SIM_CPU *cpu, INT in_FRi, INT in_FRj, INT out_FRk,
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then their latency will be less than previously recorded.
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then their latency will be less than previously recorded.
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See Table 13-13 in the LSI. */
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See Table 13-13 in the LSI. */
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if (in_FRi >= 0)
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if (in_FRi >= 0)
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{
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if (use_is_fpop (cpu, in_FRi))
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if (use_is_fpop (cpu, in_FRi))
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decrease_FR_busy (cpu, in_FRi, cycles);
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decrease_FR_busy (cpu, in_FRi, cycles);
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else
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else
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enforce_full_fr_latency (cpu, in_FRi);
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enforce_full_fr_latency (cpu, in_FRi);
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}
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if (in_FRj >= 0 && in_FRj != in_FRi)
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if (in_FRj >= 0 && in_FRj != in_FRi)
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{
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if (use_is_fpop (cpu, in_FRj))
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if (use_is_fpop (cpu, in_FRj))
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decrease_FR_busy (cpu, in_FRj, cycles);
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decrease_FR_busy (cpu, in_FRj, cycles);
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else
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else
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enforce_full_fr_latency (cpu, in_FRj);
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enforce_full_fr_latency (cpu, in_FRj);
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}
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if (out_FRk >= 0 && out_FRk != in_FRi && out_FRk != in_FRj)
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if (out_FRk >= 0 && out_FRk != in_FRi && out_FRk != in_FRj)
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{
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if (use_is_fpop (cpu, out_FRk))
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if (use_is_fpop (cpu, out_FRk))
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decrease_FR_busy (cpu, out_FRk, cycles);
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decrease_FR_busy (cpu, out_FRk, cycles);
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else
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else
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enforce_full_fr_latency (cpu, out_FRk);
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enforce_full_fr_latency (cpu, out_FRk);
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}
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}
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}
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/* Latency of floating point registers may be less than recorded when followed
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/* Latency of floating point registers may be less than recorded when followed
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by another floating point insn. */
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by another floating point insn. */
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@ -225,12 +225,14 @@ adjust_float_register_busy (SIM_CPU *cpu,
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for (i = 0; i < iwidth; ++i)
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for (i = 0; i < iwidth; ++i)
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{
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{
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if (! REG_OVERLAP (in_FRi + i, 1, out_FRk, kwidth))
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if (! REG_OVERLAP (in_FRi + i, 1, out_FRk, kwidth))
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{
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if (use_is_fr_load (cpu, in_FRi + i))
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if (use_is_fr_load (cpu, in_FRi + i))
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decrease_FR_busy (cpu, in_FRi + i, 1);
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decrease_FR_busy (cpu, in_FRi + i, 1);
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else
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else
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enforce_full_fr_latency (cpu, in_FRi + i);
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enforce_full_fr_latency (cpu, in_FRi + i);
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}
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}
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}
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}
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}
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if (in_FRj >= 0)
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if (in_FRj >= 0)
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{
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{
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@ -238,12 +240,14 @@ adjust_float_register_busy (SIM_CPU *cpu,
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{
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{
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if (! REG_OVERLAP (in_FRj + i, 1, in_FRi, iwidth)
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if (! REG_OVERLAP (in_FRj + i, 1, in_FRi, iwidth)
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&& ! REG_OVERLAP (in_FRj + i, 1, out_FRk, kwidth))
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&& ! REG_OVERLAP (in_FRj + i, 1, out_FRk, kwidth))
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{
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if (use_is_fr_load (cpu, in_FRj + i))
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if (use_is_fr_load (cpu, in_FRj + i))
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decrease_FR_busy (cpu, in_FRj + i, 1);
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decrease_FR_busy (cpu, in_FRj + i, 1);
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else
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else
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enforce_full_fr_latency (cpu, in_FRj + i);
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enforce_full_fr_latency (cpu, in_FRj + i);
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}
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}
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}
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}
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}
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if (out_FRk >= 0)
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if (out_FRk >= 0)
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{
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{
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