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gas: PR 25863: Fix scalar vmul inside it block when assembling for MVE

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This fixes PR 25863 by fixing the condition in the parsing of vmul in
do_mve_vmull.  It also simplifies the code in there fixing latent issues that
would lead to NEON code being accepted when it shouldn't.

gas/ChangeLog:
2020-05-04  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR gas/25863
	* config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
	* testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
	* testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
This commit is contained in:
Andre Simoes Dias Vieira
2020-05-04 13:05:42 +01:00
committed by Andre Vieira
parent 4706679dac
commit fe05f369f0
4 changed files with 26 additions and 9 deletions
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7
gas/ChangeLog
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@ -1,3 +1,10 @@
2020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR gas/25863
* config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
* testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
* testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
2020-05-04 Nick Clifton <nickc@redhat.com> 2020-05-04 Nick Clifton <nickc@redhat.com>
PR 25917 PR 25917

12
gas/config/tc-arm.c
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@ -18273,19 +18273,13 @@ do_mve_vmull (void)
enum neon_shape rs = neon_select_shape (NS_HHH, NS_FFF, NS_DDD, NS_DDS, enum neon_shape rs = neon_select_shape (NS_HHH, NS_FFF, NS_DDD, NS_DDS,
NS_QQS, NS_QQQ, NS_QQR, NS_NULL); NS_QQS, NS_QQQ, NS_QQR, NS_NULL);
if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext) if (inst.cond == COND_ALWAYS
&& inst.cond == COND_ALWAYS
&& ((unsigned)inst.instruction) == M_MNEM_vmullt) && ((unsigned)inst.instruction) == M_MNEM_vmullt)
{ {
if (rs == NS_QQQ) if (rs == NS_QQQ)
{ {
if (!ARM_CPU_HAS_FEATURE (cpu_variant, mve_ext))
struct neon_type_el et = neon_check_type (3, rs, N_EQK , N_EQK,
N_SUF_32 | N_F64 | N_P8
| N_P16 | N_I_MVE | N_KEY);
if (((et.type == NT_poly) && et.size == 8
&& ARM_CPU_IS_ANY (cpu_variant))
|| (et.type == NT_integer) || (et.type == NT_float))
goto neon_vmul; goto neon_vmul;
} }
else else

11
gas/testsuite/gas/arm/mve-scalar-vmul-it.d Normal file
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@ -0,0 +1,11 @@
# name: Armv8.1-M Mainline scalar vmul instructions in it blocks (with MVE)
# as: -march=armv8.1-m.main+mve.fp+fp.dp
# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
.*: +file format .*arm.*
Disassembly of section .text:
[^>]*> bfbc itt lt
[^>]*> ee20 0a81 vmullt.f32 s0, s1, s2
[^>]*> ee21 0b02 vmullt.f64 d0, d1, d2
#...

5
gas/testsuite/gas/arm/mve-scalar-vmul-it.s Normal file
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@ -0,0 +1,5 @@
.syntax unified
.text
itt lt
vmullt.f32 s0, s1, s2
vmullt.f64 d0, d1, d2