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opcodes:

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* d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
	Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
	Introduce OPERAND_GPR.
	* d10v-dis.c (print_operand): Likewise.
include/opcode:
	* d10v.h (OPERAND_ACC): Split into:
	(OPERAND_ACC0, OPERAND_ACC1) .
	(OPERAND_GPR): Define.
gas/config:
	* tc-d10v.c (parallel_ok, find_opcode):
	Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
	Introduce OPERAND_GPR.
This commit is contained in:
Joern Rennecke
1998-02-12 03:56:57 +00:00
parent 02e565a270
commit fc3c25b9e0
4 changed files with 33 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
gas/ChangeLog
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@ -1,3 +1,10 @@
Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
Fix rac to accept only a0:
* tc-d10v.c (parallel_ok, find_opcode):
Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
Introduce OPERAND_GPR.
Wed Feb 11 16:28:13 1998 Richard Henderson <rth@cygnus.com> Wed Feb 11 16:28:13 1998 Richard Henderson <rth@cygnus.com>
* read.c (s_fill): Handle non-constant repeat counts by creating * read.c (s_fill): Handle non-constant repeat counts by creating

21
gas/config/tc-d10v.c
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@ -1,6 +1,6 @@
/* tc-d10v.c -- Assembler code for the Mitsubishi D10V /* tc-d10v.c -- Assembler code for the Mitsubishi D10V
Copyright (C) 1996, 1997 Free Software Foundation. Copyright (C) 1996, 1997, 1998 Free Software Foundation.
This file is part of GAS, the GNU Assembler. This file is part of GAS, the GNU Assembler.
@ -895,7 +895,7 @@ parallel_ok (op1, insn1, op2, insn2, exec_type)
if (flags & OPERAND_REG) if (flags & OPERAND_REG)
{ {
regno = (ins >> shift) & mask; regno = (ins >> shift) & mask;
if (flags & OPERAND_ACC) if (flags & (OPERAND_ACC0|OPERAND_ACC1))
regno += 16; regno += 16;
else if (flags & OPERAND_CONTROL) /* mvtc or mvfc */ else if (flags & OPERAND_CONTROL) /* mvtc or mvfc */
{ {
@ -1148,10 +1148,9 @@ find_opcode (opcode, myops)
int num = myops[0].X_add_number; int num = myops[0].X_add_number;
if (X_op != O_register if (X_op != O_register
|| (flags & OPERAND_ACC) != (num & OPERAND_ACC) || (num & ~flags
|| (flags & OPERAND_FFLAG) != (num & OPERAND_FFLAG) & (OPERAND_GPR | OPERAND_ACC0 | OPERAND_ACC1
|| (flags & OPERAND_CFLAG) != (num & OPERAND_CFLAG) | OPERAND_FFLAG | OPERAND_CFLAG | OPERAND_CONTROL)))
|| (flags & OPERAND_CONTROL) != (num & OPERAND_CONTROL))
{ {
as_bad ("bad opcode or operands"); as_bad ("bad opcode or operands");
return 0; return 0;
@ -1232,11 +1231,11 @@ find_opcode (opcode, myops)
if (flags & OPERAND_REG) if (flags & OPERAND_REG)
{ {
if ((X_op != O_register) || if ((X_op != O_register)
((flags & OPERAND_ACC) != (num & OPERAND_ACC)) || || (num & ~flags
((flags & OPERAND_FFLAG) != (num & OPERAND_FFLAG)) || & (OPERAND_GPR | OPERAND_ACC0 | OPERAND_ACC1
((flags & OPERAND_CFLAG) != (num & OPERAND_CFLAG)) || | OPERAND_FFLAG | OPERAND_CFLAG
((flags & OPERAND_CONTROL) != (num & OPERAND_CONTROL))) | OPERAND_CONTROL)))
{ {
match=0; match=0;
break; break;

7
include/opcode/ChangeLog
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@ -1,3 +1,10 @@
Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
Fix rac to accept only a0:
* d10v.h (OPERAND_ACC): Split into:
(OPERAND_ACC0, OPERAND_ACC1) .
(OPERAND_GPR): Define.
Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com> Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
* cgen.h (CGEN_FIELDS): Define here. * cgen.h (CGEN_FIELDS): Define here.

8
opcodes/ChangeLog
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@ -1,3 +1,11 @@
Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
Fix rac to accept only a0:
* d10v-opc.c (d10v_predefined_registers, d10v_operands, d10v_opcodes):
Split OPERAND_ACC into OPERAND_ACC0 and OPERAND_ACC1.
Introduce OPERAND_GPR.
* d10v-dis.c (print_operand): Likewise.
Wed Feb 11 18:58:34 1998 Doug Evans <devans@seba.cygnus.com> Wed Feb 11 18:58:34 1998 Doug Evans <devans@seba.cygnus.com>
* cgen-opc.in: New file. * cgen-opc.in: New file.