espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-17 16:05:56 +08:00
Code Issues Packages Projects Releases Wiki Activity

Power/GAS: Don't set VLE annotation for non-VLE processors/instructions

Browse Source 
Only set the VLE flag if the instruction has been pulled via the VLE
instruction set.  This way the flag is guaranteed to be set for VLE-only
instructions or for VLE-only processors, however it'll remain clear for
dual-mode instructions on dual-mode and, more importantly, standard-mode
processors.

	gas/
	* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
	flag if both the processor and opcode flags match.

	ld/testsuite/
	* ld-powerpc/apuinfo-vle.rd: New test.
	* ld-powerpc/apuinfo-vle.s: New test source.
	* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
	handling change.
	* ld-powerpc/powerpc.exp: Run the new test.
This commit is contained in:
Maciej W. Rozycki
2014-08-22 16:52:20 +01:00
parent 84919466a8
commit fbd940576f
7 changed files with 35 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
gas/ChangeLog
View File

@ -1,3 +1,8 @@
2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
flag if both the processor and opcode flags match.
2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
* config/tc-arm.c (add_to_lit_pool): Preinitialize `imm1'.

7
gas/config/tc-ppc.c
View File

@ -3369,7 +3369,12 @@ md_assemble (char *str)
ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
if (opcode->flags & PPC_OPCODE_RFMCI)
ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
if (opcode->flags & PPC_OPCODE_VLE)
/* Only set the VLE flag if the instruction has been pulled via
the VLE instruction set. This way the flag is guaranteed to
be set for VLE-only instructions or for VLE-only processors,
however it'll remain clear for dual-mode instructions on
dual-mode and, more importantly, standard-mode processors. */
if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
}
#endif

8
ld/testsuite/ChangeLog
View File

@ -1,3 +1,11 @@
2014-08-22 Maciej W. Rozycki <macro@codesourcery.com>
* ld-powerpc/apuinfo-vle.rd: New test.
* ld-powerpc/apuinfo-vle.s: New test source.
* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
handling change.
* ld-powerpc/powerpc.exp: Run the new test.
2014-08-21 Tony Wang <tony.wang@arm.com>
* ld-arm/jump-reloc-veneers-cond.s: New test.

5
ld/testsuite/ld-powerpc/apuinfo-vle.rd Normal file
View File

@ -0,0 +1,5 @@
Hex dump of section '\.PPC\.EMB\.apuinfo':
0x00000000 (?:00000008|08000000) (?:00000020|20000000) (?:00000002|02000000) 41505569 .*APUi
0x00000010 6e666f00 (?:00420001|01004200) (?:00430001|01004300) (?:00410001|01004100) nfo.*
0x00000020 (?:01020001|01000201) (?:01040001|01000401) (?:01010001|01000101) (?:00400001|01004000) .*
0x00000030 01000001 .*

4
ld/testsuite/ld-powerpc/apuinfo-vle.s Normal file
View File

@ -0,0 +1,4 @@
.text
.global apuinfo_vle
apuinfo_vle:
se_blr

5
ld/testsuite/ld-powerpc/apuinfo.rd
View File

@ -6,7 +6,6 @@
#target: powerpc-eabi*
Hex dump of section '.PPC.EMB.apuinfo':
0x00000000 (00000008|08000000) (00000020|20000000) (00000002|02000000) 41505569 .*APUi
0x00000000 (00000008|08000000) (0000001c|1c000000) (00000002|02000000) 41505569 .*APUi
0x00000010 6e666f00 (00420001|01004200) (00430001|01004300) (00410001|01004100) nfo.*
0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) (01040001|01000401) .*
0x00000030 01000001 .*
0x00000020 (01020001|01000201) (01010001|01000101) (00400001|01004000) 01000001 .*

3
ld/testsuite/ld-powerpc/powerpc.exp
View File

@ -103,6 +103,9 @@ set ppcelftests {
{"APUinfo section processing" "-melf32ppc" ""
"-a32 -me500" {apuinfo1.s apuinfo-nul.s apuinfo2.s}
{{readelf -x2 apuinfo.rd}} "apuinfo"}
{"APUinfo VLE section processing" "-melf32ppc" ""
"-a32 -me500 -mvle" {apuinfo1.s apuinfo-vle.s apuinfo2.s}
{{readelf -x2 apuinfo-vle.rd}} "apuinfo-vle"}
{"APUinfo NULL section processing" "-melf32ppc" ""
"-a32 -me500" {apuinfo-nul1.s apuinfo-nul.s}
{{readelf -x2 apuinfo-nul.rd}} "apuinfo"}