mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-23 03:29:47 +08:00
aarch64: Add maximum immediate value to aarch64_sys_reg
The immediate form of MSR has a 4-bit immediate field (in CRm). However, many forms of MSR require a smaller immediate. These cases are identified by value in operand_general_constraint_met_p, but they're now the common case rather than the exception. This patch therefore adds the maximum value to the sys_reg description and gets the range from there. It also enforces the minimum of 0, which avoids a situation in which: msr dit, #2 would give the expected: Error: immediate value out of range 0 to 1 whereas: msr dit, #-1 would give: Error: immediate value out of range 0 to 15 (from the later UIMM4 checking). Also: - we were reporting the first error above against the wrong operand - TCO takes a single-bit immediate, but we previously allowed all 16 values. [https://developer.arm.com/documentation/ddi0596/2021-09/Base-Instructions/MSR--immediate---Move-immediate-value-to-Special-Register-?lang=en] opcodes/ * aarch64-opc.h (F_REG_MAX_VALUE, F_GET_REG_MAX_VALUE): New macros. * aarch64-opc.c (operand_general_constraint_met_p): Read the maximum MSR immediate value from aarch64_pstatefields. (aarch64_pstatefields): Add the maximum immediate value for each register. gas/ * testsuite/gas/aarch64/sysreg-4.s: Use an immediate value of 1 rather than 8 for the TCO test. * testsuite/gas/aarch64/sysreg-4.d: Update accordingly. * testsuite/gas/aarch64/armv8_2-a-illegal.l: Fix operand number in MSR immediate error messages. * testsuite/gas/aarch64/diagnostic.l: Likewise. * testsuite/gas/aarch64/pan-illegal.l: Likewise. * testsuite/gas/aarch64/ssbs-illegal1.l: Likewise. * testsuite/gas/aarch64/illegal-sysreg-4b.s, * testsuite/gas/aarch64/illegal-sysreg-4b.d, * testsuite/gas/aarch64/illegal-sysreg-4b.l: New test.
This commit is contained in:
@ -1,9 +1,9 @@
|
|||||||
[^:]+: Assembler messages:
|
[^:]+: Assembler messages:
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#2'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#2'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#3'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#3'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#4'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#4'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#5'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#5'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#8'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#8'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#15'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#15'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#19'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#19'
|
||||||
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr uao,#31'
|
[^:]+:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr uao,#31'
|
||||||
|
@ -15,7 +15,7 @@
|
|||||||
[^:]*:17: Error: extraneous register at operand 2 -- `tlbi alle3is,x0'
|
[^:]*:17: Error: extraneous register at operand 2 -- `tlbi alle3is,x0'
|
||||||
[^:]*:18: Error: missing register at operand 2 -- `tlbi vaale1is'
|
[^:]*:18: Error: missing register at operand 2 -- `tlbi vaale1is'
|
||||||
[^:]*:19: Error: comma expected between operands at operand 2 -- `tlbi vaale1is x0'
|
[^:]*:19: Error: comma expected between operands at operand 2 -- `tlbi vaale1is x0'
|
||||||
[^:]*:20: Error: immediate value out of range 0 to 1 at operand 1 -- `msr spsel,3'
|
[^:]*:20: Error: immediate value out of range 0 to 1 at operand 2 -- `msr spsel,3'
|
||||||
[^:]*:21: Error: immediate value out of range 1 to 64 at operand 3 -- `fcvtzu x15,d31,#66'
|
[^:]*:21: Error: immediate value out of range 1 to 64 at operand 3 -- `fcvtzu x15,d31,#66'
|
||||||
[^:]*:22: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,33'
|
[^:]*:22: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,33'
|
||||||
[^:]*:23: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,0'
|
[^:]*:23: Error: immediate value out of range 1 to 32 at operand 3 -- `scvtf s0,w0,0'
|
||||||
|
2
gas/testsuite/gas/aarch64/illegal-sysreg-4b.d
Normal file
2
gas/testsuite/gas/aarch64/illegal-sysreg-4b.d
Normal file
@ -0,0 +1,2 @@
|
|||||||
|
#as: -march=armv8-a
|
||||||
|
#error_output: illegal-sysreg-4b.l
|
11
gas/testsuite/gas/aarch64/illegal-sysreg-4b.l
Normal file
11
gas/testsuite/gas/aarch64/illegal-sysreg-4b.l
Normal file
@ -0,0 +1,11 @@
|
|||||||
|
[^:]*: Assembler messages:
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#-1'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#2'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#15'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#0x100000000'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#-1'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#16'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#0x200000000'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#-1'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#16'
|
||||||
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#0x200000000'
|
14
gas/testsuite/gas/aarch64/illegal-sysreg-4b.s
Normal file
14
gas/testsuite/gas/aarch64/illegal-sysreg-4b.s
Normal file
@ -0,0 +1,14 @@
|
|||||||
|
.arch armv8.5-a+memtag
|
||||||
|
|
||||||
|
msr TCO, #-1
|
||||||
|
msr TCO, #2
|
||||||
|
msr TCO, #15
|
||||||
|
msr TCO, #0x100000000
|
||||||
|
|
||||||
|
msr daifclr, #-1
|
||||||
|
msr daifclr, #16
|
||||||
|
msr daifclr, #0x200000000
|
||||||
|
|
||||||
|
msr daifset, #-1
|
||||||
|
msr daifset, #16
|
||||||
|
msr daifset, #0x200000000
|
@ -1,15 +1,15 @@
|
|||||||
[^:]*: Assembler messages:
|
[^:]*: Assembler messages:
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#2'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#2'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#3'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#3'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#4'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#4'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#5'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#5'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#6'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#6'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#7'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#7'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#8'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#8'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#9'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#9'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#10'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#10'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#11'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#11'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#12'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#12'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#13'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#13'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#14'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#14'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr pan,#15'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr pan,#15'
|
||||||
|
@ -1,15 +1,15 @@
|
|||||||
[^:]*: Assembler messages:
|
[^:]*: Assembler messages:
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#2'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#2'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#3'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#3'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#4'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#4'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#5'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#5'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#6'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#6'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#7'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#7'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#8'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#8'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#9'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#9'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#10'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#10'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#11'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#11'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#12'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#12'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#13'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#13'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#14'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#14'
|
||||||
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 1 -- `msr ssbs,#15'
|
[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr ssbs,#15'
|
||||||
|
@ -38,7 +38,7 @@ Disassembly of section \.text:
|
|||||||
.*: d51d560c msr tfsr_el12, x12
|
.*: d51d560c msr tfsr_el12, x12
|
||||||
.*: d51810a1 msr rgsr_el1, x1
|
.*: d51810a1 msr rgsr_el1, x1
|
||||||
.*: d51810c3 msr gcr_el1, x3
|
.*: d51810c3 msr gcr_el1, x3
|
||||||
.*: d503489f msr tco, #0x8
|
.*: d503419f msr tco, #0x1
|
||||||
.*: d5087661 dc igvac, x1
|
.*: d5087661 dc igvac, x1
|
||||||
.*: d5087682 dc igsw, x2
|
.*: d5087682 dc igsw, x2
|
||||||
.*: d5087a83 dc cgsw, x3
|
.*: d5087a83 dc cgsw, x3
|
||||||
|
@ -38,7 +38,7 @@ func:
|
|||||||
msr gcr_el1, x3
|
msr gcr_el1, x3
|
||||||
|
|
||||||
# MSR (immediate)
|
# MSR (immediate)
|
||||||
msr TCO, #8
|
msr TCO, #1
|
||||||
|
|
||||||
# Data cache
|
# Data cache
|
||||||
dc igvac, x1
|
dc igvac, x1
|
||||||
|
@ -1474,6 +1474,7 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
|
|||||||
uint64_t uvalue, mask;
|
uint64_t uvalue, mask;
|
||||||
const aarch64_opnd_info *opnd = opnds + idx;
|
const aarch64_opnd_info *opnd = opnds + idx;
|
||||||
aarch64_opnd_qualifier_t qualifier = opnd->qualifier;
|
aarch64_opnd_qualifier_t qualifier = opnd->qualifier;
|
||||||
|
int i;
|
||||||
|
|
||||||
assert (opcode->operands[idx] == opnd->type && opnd->type == type);
|
assert (opcode->operands[idx] == opnd->type && opnd->type == type);
|
||||||
|
|
||||||
@ -2592,32 +2593,15 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
|
|||||||
switch (type)
|
switch (type)
|
||||||
{
|
{
|
||||||
case AARCH64_OPND_PSTATEFIELD:
|
case AARCH64_OPND_PSTATEFIELD:
|
||||||
|
for (i = 0; aarch64_pstatefields[i].name; ++i)
|
||||||
|
if (aarch64_pstatefields[i].value == opnd->pstatefield)
|
||||||
|
break;
|
||||||
|
assert (aarch64_pstatefields[i].name);
|
||||||
assert (idx == 0 && opnds[1].type == AARCH64_OPND_UIMM4);
|
assert (idx == 0 && opnds[1].type == AARCH64_OPND_UIMM4);
|
||||||
/* MSR UAO, #uimm4
|
max_value = F_GET_REG_MAX_VALUE (aarch64_pstatefields[i].flags);
|
||||||
MSR PAN, #uimm4
|
if (opnds[1].imm.value < 0 || opnds[1].imm.value > max_value)
|
||||||
MSR SSBS,#uimm4
|
|
||||||
MSR SVCRSM, #uimm4
|
|
||||||
MSR SVCRZA, #uimm4
|
|
||||||
MSR SVCRSMZA, #uimm4
|
|
||||||
The immediate must be #0 or #1. */
|
|
||||||
if ((opnd->pstatefield == 0x03 /* UAO. */
|
|
||||||
|| opnd->pstatefield == 0x04 /* PAN. */
|
|
||||||
|| opnd->pstatefield == 0x19 /* SSBS. */
|
|
||||||
|| opnd->pstatefield == 0x1a /* DIT. */
|
|
||||||
|| opnd->pstatefield == 0x1b) /* SVCRSM, SVCRZA or SVCRSMZA. */
|
|
||||||
&& opnds[1].imm.value > 1)
|
|
||||||
{
|
{
|
||||||
set_imm_out_of_range_error (mismatch_detail, idx, 0, 1);
|
set_imm_out_of_range_error (mismatch_detail, 1, 0, max_value);
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
/* MSR SPSel, #uimm4
|
|
||||||
Uses uimm4 as a control value to select the stack pointer: if
|
|
||||||
bit 0 is set it selects the current exception level's stack
|
|
||||||
pointer, if bit 0 is clear it selects shared EL0 stack pointer.
|
|
||||||
Bits 1 to 3 of uimm4 are reserved and should be zero. */
|
|
||||||
if (opnd->pstatefield == 0x05 /* spsel */ && opnds[1].imm.value > 1)
|
|
||||||
{
|
|
||||||
set_imm_out_of_range_error (mismatch_detail, idx, 0, 1);
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@ -5033,17 +5017,20 @@ aarch64_sys_reg_deprecated_p (const uint32_t reg_flags)
|
|||||||
0b011010 (0x1a). */
|
0b011010 (0x1a). */
|
||||||
const aarch64_sys_reg aarch64_pstatefields [] =
|
const aarch64_sys_reg aarch64_pstatefields [] =
|
||||||
{
|
{
|
||||||
SR_CORE ("spsel", 0x05, 0),
|
SR_CORE ("spsel", 0x05, F_REG_MAX_VALUE (1)),
|
||||||
SR_CORE ("daifset", 0x1e, 0),
|
SR_CORE ("daifset", 0x1e, F_REG_MAX_VALUE (15)),
|
||||||
SR_CORE ("daifclr", 0x1f, 0),
|
SR_CORE ("daifclr", 0x1f, F_REG_MAX_VALUE (15)),
|
||||||
SR_PAN ("pan", 0x04, 0),
|
SR_PAN ("pan", 0x04, F_REG_MAX_VALUE (1)),
|
||||||
SR_V8_2 ("uao", 0x03, 0),
|
SR_V8_2 ("uao", 0x03, F_REG_MAX_VALUE (1)),
|
||||||
SR_SSBS ("ssbs", 0x19, 0),
|
SR_SSBS ("ssbs", 0x19, F_REG_MAX_VALUE (1)),
|
||||||
SR_V8_4 ("dit", 0x1a, 0),
|
SR_V8_4 ("dit", 0x1a, F_REG_MAX_VALUE (1)),
|
||||||
SR_MEMTAG ("tco", 0x1c, 0),
|
SR_MEMTAG ("tco", 0x1c, F_REG_MAX_VALUE (1)),
|
||||||
SR_SME ("svcrsm", 0x1b, PSTATE_ENCODE_CRM_AND_IMM(0x2,0x1)),
|
SR_SME ("svcrsm", 0x1b, PSTATE_ENCODE_CRM_AND_IMM(0x2,0x1)
|
||||||
SR_SME ("svcrza", 0x1b, PSTATE_ENCODE_CRM_AND_IMM(0x4,0x1)),
|
| F_REG_MAX_VALUE (1)),
|
||||||
SR_SME ("svcrsmza", 0x1b, PSTATE_ENCODE_CRM_AND_IMM(0x6,0x1)),
|
SR_SME ("svcrza", 0x1b, PSTATE_ENCODE_CRM_AND_IMM(0x4,0x1)
|
||||||
|
| F_REG_MAX_VALUE (1)),
|
||||||
|
SR_SME ("svcrsmza", 0x1b, PSTATE_ENCODE_CRM_AND_IMM(0x6,0x1)
|
||||||
|
| F_REG_MAX_VALUE (1)),
|
||||||
{ 0, CPENC (0,0,0,0,0), 0, 0 },
|
{ 0, CPENC (0,0,0,0,0), 0, 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -273,6 +273,10 @@ verify_constraints (const struct aarch64_inst *, const aarch64_insn, bfd_vma,
|
|||||||
(F_REG_IN_CRM | PSTATE_ENCODE_CRM(CVAL) \
|
(F_REG_IN_CRM | PSTATE_ENCODE_CRM(CVAL) \
|
||||||
| F_IMM_IN_CRM | PSTATE_ENCODE_CRM_IMM(IMASK))
|
| F_IMM_IN_CRM | PSTATE_ENCODE_CRM_IMM(IMASK))
|
||||||
|
|
||||||
|
/* Bits [15, 18] contain the maximum value for an immediate MSR. */
|
||||||
|
#define F_REG_MAX_VALUE(X) ((X) << 15)
|
||||||
|
#define F_GET_REG_MAX_VALUE(X) (((X) >> 15) & 0x0f)
|
||||||
|
|
||||||
/* HINT operand flags. */
|
/* HINT operand flags. */
|
||||||
#define HINT_OPD_F_NOPRINT (1 << 0) /* Should not be printed. */
|
#define HINT_OPD_F_NOPRINT (1 << 0) /* Should not be printed. */
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user