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* m68k-dis.c (print_insn_arg): Add movecr register names for

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coldfire v4e families.
This commit is contained in:
Nick Clifton
2009-08-26 13:16:29 +00:00
parent e9e0a58e87
commit f7922329bf
2 changed files with 49 additions and 19 deletions
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5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2009-08-26 Philippe De Muyter <phdm@macqel.be>
* m68k-dis.c (print_insn_arg): Add movecr register names for
coldfire v4e families.
2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> 2009-08-25 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
* Makefile.am (SUBDIRS): Build '.' before 'po'. * Makefile.am (SUBDIRS): Build '.' before 'po'.

45
opcodes/m68k-dis.c
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@ -1,6 +1,6 @@
/* Print Motorola 68k instructions. /* Print Motorola 68k instructions.
Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009
Free Software Foundation, Inc. Free Software Foundation, Inc.
This file is part of the GNU opcodes library. This file is part of the GNU opcodes library.
@ -699,35 +699,60 @@ print_insn_arg (const char *d,
case 'J': case 'J':
{ {
/* FIXME: There's a problem here, different m68k processors call the /* FIXME: There's a problem here, different m68k processors call the
same address different names. This table can't get it right same address different names. The tables below try to get it right
because it doesn't know which processor it's disassembling for. */ using info->mach, but only for v4e. */
static const struct { char *name; int value; } names[] struct regname { char * name; int value; };
= {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002}, static const struct regname names[] =
{
{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002},
{"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005}, {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005},
{"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008}, {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008},
{"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802}, {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802},
{"%msp", 0x803}, {"%isp", 0x804}, {"%msp", 0x803}, {"%isp", 0x804},
/* reg c04 is sometimes called flashbar or rambar. {"%pc", 0x80f},
rec c05 is also sometimes called rambar. */ /* Reg c04 is sometimes called flashbar or rambar.
Rec c05 is also sometimes called rambar. */
{"%rambar0", 0xc04}, {"%rambar1", 0xc05}, {"%rambar0", 0xc04}, {"%rambar1", 0xc05},
{"%mbar", 0xc0f},
/* Should we be calling this psr like we do in case 'Y'? */ /* Should we be calling this psr like we do in case 'Y'? */
{"%mmusr",0x805}, {"%mmusr",0x805},
{"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}, {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808},
/* Fido added these. */ /* Fido added these. */
{"%cac", 0xffe}, {"%mbo", 0xfff}}; {"%cac", 0xffe}, {"%mbo", 0xfff}
};
/* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */
static const struct regname names_v4e[] =
{
{"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005},
{"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008},
};
unsigned int arch_mask;
arch_mask = bfd_m68k_mach_to_features (info->mach);
FETCH_ARG (12, val); FETCH_ARG (12, val);
for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--) if (arch_mask & (mcfisa_b | mcfisa_c))
{
for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;)
if (names_v4e[regno].value == val)
{
(*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name);
break;
}
if (regno >= 0)
break;
}
for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--)
if (names[regno].value == val) if (names[regno].value == val)
{ {
(*info->fprintf_func) (info->stream, "%s", names[regno].name); (*info->fprintf_func) (info->stream, "%s", names[regno].name);
break; break;
} }
if (regno < 0) if (regno < 0)
(*info->fprintf_func) (info->stream, "%d", val); (*info->fprintf_func) (info->stream, "0x%x", val);
} }
break; break;