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opcodes/

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* mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
	"sync_mb", "sync_release", "sync_rmb" and "sync_wmb".

	gas/testsuite/
	* gas/mips/mips32r2-sync.d: New test for MIPS32r2 "sync"
	instruction variants.
	* gas/mips/octeon@mips32r2-sync.d: Likewise, Octeon version.
	* gas/mips/mips32r2-sync.s: Source for the new test.
	* gas/mips/mips.exp: Run the new test.
This commit is contained in:
Maciej W. Rozycki
2010-09-14 23:49:04 +00:00
parent 923c6a3dd1
commit f6690563bb
7 changed files with 104 additions and 0 deletions
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8
gas/testsuite/ChangeLog
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@ -1,3 +1,11 @@
2010-09-14 Maciej W. Rozycki <macro@codesourcery.com>
* gas/mips/mips32r2-sync.d: New test for MIPS32r2 "sync"
instruction variants.
* gas/mips/octeon@mips32r2-sync.d: Likewise, Octeon version.
* gas/mips/mips32r2-sync.s: Source for the new test.
* gas/mips/mips.exp: Run the new test.
2010-09-13 Kai Tietz <kai.tietz@onevision.com> 2010-09-13 Kai Tietz <kai.tietz@onevision.com>
* gas/pe/pe.exp: Add x64 SEH tests. * gas/pe/pe.exp: Add x64 SEH tests.

2
gas/testsuite/gas/mips/mips.exp
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@ -877,6 +877,8 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16-vis-1" run_dump_test "mips16-vis-1"
run_dump_test "call-nonpic-1" run_dump_test "call-nonpic-1"
run_dump_test "mips32-sync" run_dump_test "mips32-sync"
run_dump_test_arches "mips32r2-sync" \
[mips_arch_list_matching mips32r2]
if $has_newabi { run_dump_test "cfi-n64-1" } if $has_newabi { run_dump_test "cfi-n64-1" }

29
gas/testsuite/gas/mips/mips32r2-sync.d Normal file
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@ -0,0 +1,29 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS32r2 sync instructions
#as: -32
#source: mips32r2-sync.s
# Check MIPS32r2 sync instructions assembly and disassembly
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 0000000f sync
[0-9a-f]+ <[^>]*> 0000008f sync 0x2
[0-9a-f]+ <[^>]*> 0000010f sync_wmb
[0-9a-f]+ <[^>]*> 0000020f sync 0x8
[0-9a-f]+ <[^>]*> 0000040f sync_mb
[0-9a-f]+ <[^>]*> 0000044f sync_acquire
[0-9a-f]+ <[^>]*> 0000048f sync_release
[0-9a-f]+ <[^>]*> 000004cf sync_rmb
[0-9a-f]+ <[^>]*> 0000060f sync 0x18
[0-9a-f]+ <[^>]*> 0000000f sync
[0-9a-f]+ <[^>]*> 0000008f sync 0x2
[0-9a-f]+ <[^>]*> 0000010f sync_wmb
[0-9a-f]+ <[^>]*> 0000020f sync 0x8
[0-9a-f]+ <[^>]*> 0000040f sync_mb
[0-9a-f]+ <[^>]*> 0000044f sync_acquire
[0-9a-f]+ <[^>]*> 0000048f sync_release
[0-9a-f]+ <[^>]*> 000004cf sync_rmb
[0-9a-f]+ <[^>]*> 0000060f sync 0x18
\.\.\.

26
gas/testsuite/gas/mips/mips32r2-sync.s Normal file
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@ -0,0 +1,26 @@
# Source file to test assembly of MIPS32r2 sync instructions.
.text
foo:
sync
sync 2
sync_wmb
sync 8
sync_mb
sync_acquire
sync_release
sync_rmb
sync 0x18
sync 0
sync 2
sync 4
sync 8
sync 0x10
sync 0x11
sync 0x12
sync 0x13
sync 0x18
# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
.align 2
.space 8

29
gas/testsuite/gas/mips/octeon@mips32r2-sync.d Normal file
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@ -0,0 +1,29 @@
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS32r2 sync instructions
#as: -32
#source: mips32r2-sync.s
# Check MIPS32r2 sync instructions assembly and disassembly (Octeon).
.*: +file format .*mips.*
Disassembly of section \.text:
[0-9a-f]+ <[^>]*> 0000000f sync
[0-9a-f]+ <[^>]*> 0000008f synciobdma
[0-9a-f]+ <[^>]*> 0000010f syncw
[0-9a-f]+ <[^>]*> 0000020f sync 0x8
[0-9a-f]+ <[^>]*> 0000040f sync_mb
[0-9a-f]+ <[^>]*> 0000044f sync_acquire
[0-9a-f]+ <[^>]*> 0000048f sync_release
[0-9a-f]+ <[^>]*> 000004cf sync_rmb
[0-9a-f]+ <[^>]*> 0000060f sync 0x18
[0-9a-f]+ <[^>]*> 0000000f sync
[0-9a-f]+ <[^>]*> 0000008f synciobdma
[0-9a-f]+ <[^>]*> 0000010f syncw
[0-9a-f]+ <[^>]*> 0000020f sync 0x8
[0-9a-f]+ <[^>]*> 0000040f sync_mb
[0-9a-f]+ <[^>]*> 0000044f sync_acquire
[0-9a-f]+ <[^>]*> 0000048f sync_release
[0-9a-f]+ <[^>]*> 000004cf sync_rmb
[0-9a-f]+ <[^>]*> 0000060f sync 0x18
\.\.\.

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2010-09-14 Maciej W. Rozycki <macro@codesourcery.com>
* mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
2010-09-10 Pierre Muller <muller@ics.u-strasbg.fr> 2010-09-10 Pierre Muller <muller@ics.u-strasbg.fr>
* src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for

5
opcodes/mips-opc.c
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@ -1335,6 +1335,11 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"syncs", "", 0x0000018f, 0xffffffff, INSN_SYNC, 0, IOCT }, {"syncs", "", 0x0000018f, 0xffffffff, INSN_SYNC, 0, IOCT },
{"syncw", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, IOCT }, {"syncw", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, IOCT },
{"syncws", "", 0x0000014f, 0xffffffff, INSN_SYNC, 0, IOCT }, {"syncws", "", 0x0000014f, 0xffffffff, INSN_SYNC, 0, IOCT },
{"sync_acquire", "", 0x0000044f, 0xffffffff, INSN_SYNC, 0, I33 },
{"sync_mb", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I33 },
{"sync_release", "", 0x0000048f, 0xffffffff, INSN_SYNC, 0, I33 },
{"sync_rmb", "", 0x000004cf, 0xffffffff, INSN_SYNC, 0, I33 },
{"sync_wmb", "", 0x0000010f, 0xffffffff, INSN_SYNC, 0, I33 },
{"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2|G1 }, {"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC, 0, I2|G1 },
{"sync", "1", 0x0000000f, 0xfffff83f, INSN_SYNC, 0, I32 }, {"sync", "1", 0x0000000f, 0xfffff83f, INSN_SYNC, 0, I32 },
{"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I2 }, {"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC, 0, I2 },