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[gas]
2004-04-01 Asgari Jinia <asgarij@kpitcummins.com> Dhananjay Deshpande <dhananjayd@kpitcummins.com> * config/tc-sh.c (dont_adjust_reloc_32): New variable. (sh_fix_adjustable): Avoid adjusting BFD_RELOC_32 when dont_adjust_reloc_32 is set. (md_longopts): Add option -renesas. (md_parse_option, md_show_usage): Likewise. * doc/c-sh.texi: Likewise. [gas/testsuite] 2004-04-01 Asgari Jinia <asgarij@kpitcummins.com> * gas/sh/renesas-1.s, gas/sh/renesas-1.d: New test for -renesas option. * gas/sh/basic.exp: Run the new test.
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@ -1,3 +1,13 @@
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2004-04-01 Asgari Jinia <asgarij@kpitcummins.com>
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Dhananjay Deshpande <dhananjayd@kpitcummins.com>
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* config/tc-sh.c (dont_adjust_reloc_32): New variable.
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(sh_fix_adjustable): Avoid adjusting BFD_RELOC_32 when
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dont_adjust_reloc_32 is set.
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(md_longopts): Add option -renesas.
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(md_parse_option, md_show_usage): Likewise.
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* doc/c-sh.texi: Likewise.
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2004-04-01 Dave Korn <dk@artimi.com>
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2004-04-01 Dave Korn <dk@artimi.com>
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* config/tc-dlx.c (md_assemble): set fx_no_overflow flag for
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* config/tc-dlx.c (md_assemble): set fx_no_overflow flag for
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@ -132,6 +132,10 @@ int sh_relax; /* set if -relax seen */
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int sh_small;
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int sh_small;
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/* Flag to generate relocations against symbol values for local symbols. */
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static int dont_adjust_reloc_32;
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/* preset architecture set, if given; zero otherwise. */
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/* preset architecture set, if given; zero otherwise. */
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static int preset_target_arch;
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static int preset_target_arch;
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@ -2883,6 +2887,7 @@ struct option md_longopts[] =
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#define OPTION_SMALL (OPTION_LITTLE + 1)
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#define OPTION_SMALL (OPTION_LITTLE + 1)
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#define OPTION_DSP (OPTION_SMALL + 1)
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#define OPTION_DSP (OPTION_SMALL + 1)
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#define OPTION_ISA (OPTION_DSP + 1)
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#define OPTION_ISA (OPTION_DSP + 1)
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#define OPTION_RENESAS (OPTION_ISA + 1)
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{"relax", no_argument, NULL, OPTION_RELAX},
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{"relax", no_argument, NULL, OPTION_RELAX},
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{"big", no_argument, NULL, OPTION_BIG},
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{"big", no_argument, NULL, OPTION_BIG},
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@ -2890,8 +2895,10 @@ struct option md_longopts[] =
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{"small", no_argument, NULL, OPTION_SMALL},
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{"small", no_argument, NULL, OPTION_SMALL},
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{"dsp", no_argument, NULL, OPTION_DSP},
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{"dsp", no_argument, NULL, OPTION_DSP},
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{"isa", required_argument, NULL, OPTION_ISA},
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{"isa", required_argument, NULL, OPTION_ISA},
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{"renesas", no_argument, NULL, OPTION_RENESAS},
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#ifdef HAVE_SH64
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#ifdef HAVE_SH64
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#define OPTION_ABI (OPTION_ISA + 1)
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#define OPTION_ABI (OPTION_RENESAS + 1)
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#define OPTION_NO_MIX (OPTION_ABI + 1)
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#define OPTION_NO_MIX (OPTION_ABI + 1)
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#define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
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#define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1)
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#define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
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#define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1)
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@ -2932,6 +2939,10 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
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preset_target_arch = arch_sh1_up & ~arch_sh2e_up;
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preset_target_arch = arch_sh1_up & ~arch_sh2e_up;
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break;
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break;
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case OPTION_RENESAS:
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dont_adjust_reloc_32 = 1;
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break;
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case OPTION_ISA:
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case OPTION_ISA:
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if (strcasecmp (arg, "sh4") == 0)
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if (strcasecmp (arg, "sh4") == 0)
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preset_target_arch = arch_sh4;
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preset_target_arch = arch_sh4;
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@ -3019,6 +3030,8 @@ SH options:\n\
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-little generate little endian code\n\
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-little generate little endian code\n\
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-big generate big endian code\n\
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-big generate big endian code\n\
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-relax alter jump instructions for long displacements\n\
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-relax alter jump instructions for long displacements\n\
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-renesas disable optimization with section symbol for\n\
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compatibility with Renesas assembler.\n\
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-small align sections to 4 byte boundaries, not 16\n\
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-small align sections to 4 byte boundaries, not 16\n\
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-dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
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-dsp enable sh-dsp insns, and disable floating-point ISAs.\n\
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-isa=[sh4\n\
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-isa=[sh4\n\
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@ -3564,6 +3577,7 @@ sh_fix_adjustable (fixS *fixP)
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if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
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if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL
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|| fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
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|| fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL
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|| fixP->fx_r_type == BFD_RELOC_SH_GOTPC
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|| fixP->fx_r_type == BFD_RELOC_SH_GOTPC
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|| ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32)
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|| fixP->fx_r_type == BFD_RELOC_RVA)
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|| fixP->fx_r_type == BFD_RELOC_RVA)
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return 0;
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return 0;
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@ -29,6 +29,7 @@
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@kindex -relax
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@kindex -relax
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@kindex -small
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@kindex -small
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@kindex -dsp
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@kindex -dsp
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@kindex -renesas
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@item -little
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@item -little
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Generate little endian code.
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Generate little endian code.
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@ -45,6 +46,10 @@ Align sections to 4 byte boundaries, not 16.
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@item -dsp
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@item -dsp
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Enable sh-dsp insns, and disable sh3e / sh4 insns.
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Enable sh-dsp insns, and disable sh3e / sh4 insns.
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@item -renesas
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Disable optimization with section symbol for compatibility with
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Renesas assembler.
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@item -isa=sh4 | sh4a
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@item -isa=sh4 | sh4a
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Specify the sh4 or sh4a instruction set.
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Specify the sh4 or sh4a instruction set.
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@item -isa=dsp
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@item -isa=dsp
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@ -1,3 +1,9 @@
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2004-04-01 Asgari Jinia <asgarij@kpitcummins.com>
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* gas/sh/renesas-1.s, gas/sh/renesas-1.d: New test for -renesas
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option.
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* gas/sh/basic.exp: Run the new test.
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2004-04-01 Dave Korn <dk@artimi.com>
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2004-04-01 Dave Korn <dk@artimi.com>
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* gas/dlx/alltests.exp: Execute new lohi test.
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* gas/dlx/alltests.exp: Execute new lohi test.
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@ -157,6 +157,9 @@ if [istarget sh*-*-*] then {
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run_dump_test "tlspic"
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run_dump_test "tlspic"
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run_dump_test "tlsnopic"
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run_dump_test "tlsnopic"
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# Test -renesas.
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run_dump_test "renesas-1"
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}
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}
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}
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}
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11
gas/testsuite/gas/sh/renesas-1.d
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11
gas/testsuite/gas/sh/renesas-1.d
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#objdump: -dr
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#as: -renesas
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.*: +file format .*
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Disassembly of section .text:
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00000000 <foo-0x4>:
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0: 00 00 [ ]*\.word 0x0000
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[ ]+0: R_SH_DIR32 foo
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\.\.\.
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3
gas/testsuite/gas/sh/renesas-1.s
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3
gas/testsuite/gas/sh/renesas-1.s
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.text
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.long foo
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foo:
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