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2005-02-22 Paul Brook <paul@codesourcery.com>

Browse Source 
gas/
	* config/tc-arm.c (do_pld): Remove incorrect write to
	inst.instruction.
	(encode_thumb32_addr_mode): Use correct operand.
gas/testsuite/
	* gas/arm/thumb32.d: Fix expected pld opcode.
This commit is contained in:
Paul Brook
2006-02-22 15:03:30 +00:00
parent 0dd0cb2909
commit f40d164325
4 changed files with 14 additions and 5 deletions
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6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2005-02-22 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (do_pld): Remove incorrect write to
inst.instruction.
(encode_thumb32_addr_mode): Use correct operand.
2006-02-21 Paul Brook <paul@codesourcery.com> 2006-02-21 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (md_apply_fix): Fix off-by-one errors. * config/tc-arm.c (md_apply_fix): Fix off-by-one errors.

5
gas/config/tc-arm.c
View File

@ -5181,7 +5181,6 @@ do_pld (void)
_("writeback used in preload instruction")); _("writeback used in preload instruction"));
constraint (!inst.operands[0].preind, constraint (!inst.operands[0].preind,
_("unindexed addressing used in preload instruction")); _("unindexed addressing used in preload instruction"));
inst.instruction |= inst.operands[0].reg;
encode_arm_addr_mode_2 (0, /*is_t=*/FALSE); encode_arm_addr_mode_2 (0, /*is_t=*/FALSE);
} }
@ -5900,7 +5899,7 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
constraint (inst.operands[i].shifted && inst.operands[i].shift_kind != SHIFT_LSL, constraint (inst.operands[i].shifted && inst.operands[i].shift_kind != SHIFT_LSL,
_("Thumb supports only LSL in shifted register indexing")); _("Thumb supports only LSL in shifted register indexing"));
inst.instruction |= inst.operands[1].imm; inst.instruction |= inst.operands[i].imm;
if (inst.operands[i].shifted) if (inst.operands[i].shifted)
{ {
constraint (inst.reloc.exp.X_op != O_constant, constraint (inst.reloc.exp.X_op != O_constant,
@ -5916,7 +5915,7 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
{ {
constraint (is_pc && inst.operands[i].writeback, constraint (is_pc && inst.operands[i].writeback,
_("cannot use writeback with PC-relative addressing")); _("cannot use writeback with PC-relative addressing"));
constraint (is_t && inst.operands[1].writeback, constraint (is_t && inst.operands[i].writeback,
_("cannot use writeback with this instruction")); _("cannot use writeback with this instruction"));
if (is_d) if (is_d)

4
gas/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2005-02-22 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb32.d: Fix expected pld opcode.
2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
Anil Paranjape <anilp1@kpitcummins.com> Anil Paranjape <anilp1@kpitcummins.com>
Shilin Shakti <shilins@kpitcummins.com> Shilin Shakti <shilins@kpitcummins.com>

4
gas/testsuite/gas/arm/thumb32.d
View File

@ -513,8 +513,8 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f815 f930 pld \[r5\], #-48 0[0-9a-f]+ <[^>]+> f815 f930 pld \[r5\], #-48
0[0-9a-f]+ <[^>]+> f815 ff30 pld \[r5, #48\]! 0[0-9a-f]+ <[^>]+> f815 ff30 pld \[r5, #48\]!
0[0-9a-f]+ <[^>]+> f815 fd30 pld \[r5, #-48\]! 0[0-9a-f]+ <[^>]+> f815 fd30 pld \[r5, #-48\]!
0[0-9a-f]+ <[^>]+> f815 f000 pld \[r5, r0\] 0[0-9a-f]+ <[^>]+> f815 f004 pld \[r5, r4\]
0[0-9a-f]+ <[^>]+> f819 f000 pld \[r9, r0\] 0[0-9a-f]+ <[^>]+> f819 f00c pld \[r9, ip\]
0[0-9a-f]+ <[^>]+> f89f f006 pld \[pc, #6\] ; 0+5ba <[^>]+> 0[0-9a-f]+ <[^>]+> f89f f006 pld \[pc, #6\] ; 0+5ba <[^>]+>
0[0-9a-f]+ <[^>]+> f81f f02a pld \[pc, #-42\] ; 0+58e <[^>]+> 0[0-9a-f]+ <[^>]+> f81f f02a pld \[pc, #-42\] ; 0+58e <[^>]+>
0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\] 0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\]