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Add support for the AVR Tiny series of microcontrollers.
* archures.c: add avrtiny architecture for avr target.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): add avrtiny arch info.
* elf32-avr.c (elf_avr_howto_table): new relocation R_AVR_LDS_STS_16
added for 16 bit LDS/STS instruction of avrtiny arch.
(avr_reloc_map): reloc R_AVR_LDS_STS_16 is mapped to
BFD_RELOC_AVR_LDS_STS_16.
(bfd_elf_avr_final_write_processing): select machine number avrtiny arch.
(elf32_avr_object_p): set machine number for avrtiny arch.
* libbfd.h: Regenerate.
* reloc.c: Add documentation for BFD_RELOC_AVR_LDS_STS_16 reloc.
* config/tc-avr.c (mcu_types): Add avrtiny arch.
Add avrtiny arch devices attiny4, attiny5, attiny9, attiny10, attiny20
and attiny40.
(md_show_usage): Add avrtiny arch in usage message.
(avr_operand): validate and issue error for invalid register for avrtiny.
add new reloc exp for 16 bit lds/sts instruction.
(md_apply_fix): check 16 bit lds/sts operand for out of range and encode.
(md_assemble): check ISA for arch and issue diagnostic.
* include/elf/avr.h (E_AVR_MACH_AVRTINY): define avrtiny machine number.
(R_AVR_LDS_STS_16): define 16 bit lds/sts reloc number.
* include/opcode/avr.h (AVR_ISA_TINY): define avrtiny specific ISA.
(AVR_ISA_2xxxa): define ISA without LPM.
(AVR_ISA_AVRTINY): define avrtiny arch ISA.
Add doc for contraint used in 16 bit lds/sts.
Adjust ISA group for icall, ijmp, pop and push.
Add 16 bit lds/sts encoding and update 32 bit lds/sts constraints.
* opcodes/avr-dis.c (avr_operand): Handle constraint j for 16 bit lds/sts.
(print_insn_avr): do not select opcode if insn ISA is avrtiny and machine
is not avrtiny.
* Makefile.am (ALL_EMULATION_SOURCES): add avrtiny emulation source.
(eavrtiny.c): add rules for avrtiny emulation source.
* Makefile.in: Regenerate.
* configure.tgt: Add avrtiny to avr target emulations.
* scripttempl/avrtiny.sc: New file.
linker script template for avrtiny arch.
* emulparams/avrtiny.sh: New file.
emulation parameters for avrtiny arch.
This commit is contained in:
Barney Stratford
committed by
Nick Clifton
Nick Clifton
parent
ba8e7d1e24
commit
f36e88862f
@ -22,6 +22,7 @@
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#define AVR_ISA_LPM 0x0002 /* device has LPM */
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#define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
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#define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
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#define AVR_ISA_TINY 0x0010 /* device has Tiny core specific encodings */
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#define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL
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supported, no 8K wrap on RJMP and RCALL) */
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#define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */
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@ -37,6 +38,7 @@
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#define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
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#define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
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#define AVR_ISA_2xxxa (AVR_ISA_1200 | AVR_ISA_SRAM)
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/* For the attiny26 which is missing LPM Rd,Z+. */
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#define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX)
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#define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX)
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@ -72,6 +74,9 @@
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AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
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AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW)
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#define AVR_ISA_AVRTINY (AVR_ISA_1200 | AVR_ISA_BRK | AVR_ISA_SRAM | \
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AVR_ISA_TINY)
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#define REGISTER_P(x) ((x) == 'r' \
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|| (x) == 'd' \
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|| (x) == 'w' \
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@ -94,7 +99,7 @@
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`ld r,b' or `st b,r' respectively - next opcode entry)? */
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#define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000)
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/* constraint letters
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/* Constraint letters:
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r - any register
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d - `ldi' register (r16-r31)
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v - `movw' even register (r0, r2, ..., r28, r30)
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@ -110,6 +115,7 @@
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p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
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K - immediate value from 0 to 63 (used in `adiw', `sbiw')
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i - immediate value
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j - 7 bit immediate value from 0x40 to 0xBF (for 16-bit 'lds'/'sts')
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l - signed pc relative offset from -64 to 63
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L - signed pc relative offset from -2048 to 2047
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h - absolute code address (call, jmp)
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@ -156,12 +162,12 @@ AVR_INSN (set, "", "1001010001101000", 1, AVR_ISA_1200, 0x9468)
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AVR_INSN (sev, "", "1001010000111000", 1, AVR_ISA_1200, 0x9438)
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AVR_INSN (sez, "", "1001010000011000", 1, AVR_ISA_1200, 0x9418)
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/* Same as {cl,se}[chinstvz] above. */
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/* Same as {cl,se}[chinstvz] above. */
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AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
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AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
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AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
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AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
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AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxxa,0x9509)
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AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxxa,0x9409)
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AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
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AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
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@ -190,7 +196,7 @@ AVR_INSN (or, "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
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AVR_INSN (sbc, "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
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AVR_INSN (sub, "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
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/* Shorthand for {eor,add,adc,and} r,r above. */
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/* Shorthand for {eor,add,adc,and} r,r above. */
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AVR_INSN (clr, "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
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AVR_INSN (lsl, "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
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AVR_INSN (rol, "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
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@ -245,7 +251,7 @@ AVR_INSN (brts, "l", "111100lllllll110", 1, AVR_ISA_1200, 0xf006)
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AVR_INSN (brvc, "l", "111101lllllll011", 1, AVR_ISA_1200, 0xf403)
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AVR_INSN (brvs, "l", "111100lllllll011", 1, AVR_ISA_1200, 0xf003)
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/* Same as br?? above. */
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/* Same as br?? above. */
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AVR_INSN (brbc, "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400)
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AVR_INSN (brbs, "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000)
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@ -261,18 +267,18 @@ AVR_INSN (dec, "r", "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a)
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AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
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AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
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AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
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AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
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AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
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AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxxa,0x900f)
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AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxxa,0x920f)
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AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
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AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
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/* Atomic memory operations for XMEGA. List before `sts'. */
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/* Atomic memory operations for XMEGA. List before `sts'. */
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AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204)
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AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205)
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AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206)
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AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207)
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/* Known to be decoded as `nop' by the old core. */
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/* Known to be decoded as `nop' by the old core. */
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AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)
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AVR_INSN (muls, "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL, 0x0200)
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AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL, 0x0300)
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@ -280,21 +286,23 @@ AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL, 0x0308)
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AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380)
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AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388)
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AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
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AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
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AVR_INSN (sts, "j,d", "10101kkkddddkkkk", 1, AVR_ISA_TINY, 0xA800)
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AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
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AVR_INSN (lds, "d,j", "10100kkkddddkkkk", 1, AVR_ISA_TINY, 0xA000)
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AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
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/* Special case for b+0, `e' must be next entry after `b',
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b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X. */
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/* Special case for b+0, `e' must be next entry after `b',
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b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X. */
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AVR_INSN (ldd, "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000)
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AVR_INSN (ld, "r,e", "100!000dddddee-+", 1, AVR_ISA_1200, 0x8000)
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AVR_INSN (std, "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200)
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AVR_INSN (st, "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
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/* These are for devices that don't exist yet
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(>128K program memory, PC = EIND:Z). */
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/* These are for devices that don't exist yet
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(>128K program memory, PC = EIND:Z). */
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AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
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AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
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/* DES instruction for encryption and decryption */
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/* DES instruction for encryption and decryption. */
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AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)
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