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[ARC] Add support for Quarkse opcodes.

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gas/
2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * testsuite/gas/arc/ext2op.d: New file.
        * testsuite/gas/arc/ext2op.s: Likewise.
        * testsuite/gas/arc/ext3op.d: Likewise.
        * testsuite/gas/arc/ext3op.s: Likewise.

opcodes/
2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-tbl.h (invld07): Remove.
        * arc-ext-tbl.h: New file.
        * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
        * arc-opc.c (arc_opcodes): Add ext-tbl include.

include/
2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>

        * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
        (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
        (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
        (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
        (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
        (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
        (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
        (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
        (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
        (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
        (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
        (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
        (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
        (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
This commit is contained in:
Claudiu Zissulescu
2016-03-29 14:49:22 +02:00
parent 17b9d67d4e
commit f2dd88387a
12 changed files with 401 additions and 6 deletions
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72
include/opcode/arc.h
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@ -64,6 +64,7 @@ typedef enum
MPY7E,
MPY8E,
MPY9E,
QUARKSE,
SHFT1,
SHFT2,
SWAP,
@ -415,4 +416,75 @@ extern const unsigned arc_num_aux_regs;
extern const struct arc_opcode arc_relax_opcodes[];
extern const unsigned arc_num_relax_opcodes;
/* Macros to help generating regular pattern instructions. */
#define FIELDA(word) (word & 0x3F)
#define FIELDB(word) (((word & 0x07) << 24) | (((word >> 3) & 0x07) << 12))
#define FIELDC(word) ((word & 0x3F) << 6)
#define FIELDF (0x01 << 15)
#define FIELDQ (0x1F)
#define INSN3OP(MOP,SOP) (((MOP & 0x1F) << 27) | ((SOP & 0x3F) << 16))
#define INSN2OPX(MOP,SOP1,SOP2) (INSN3OP (MOP,SOP1) | (SOP2 & 0x3F))
#define INSN2OP(MOP,SOP) (INSN2OPX (MOP,0x2F,SOP))
#define INSN3OP_ABC(MOP,SOP) (INSN3OP (MOP,SOP))
#define INSN3OP_ALC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDB (62))
#define INSN3OP_ABL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDC (62))
#define INSN3OP_ALL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDB (62) | FIELDC (62))
#define INSN3OP_0BC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62))
#define INSN3OP_0LC(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | FIELDB (62))
#define INSN3OP_0BL(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | FIELDC (62))
#define INSN3OP_0LL(MOP,SOP) \
(INSN3OP (MOP,SOP) | FIELDA (62) | FIELDB (62) | FIELDC (62))
#define INSN3OP_ABU(MOP,SOP) (INSN3OP (MOP,SOP) | (0x01 << 22))
#define INSN3OP_ALU(MOP,SOP) (INSN3OP (MOP,SOP) | (0x01 << 22) | FIELDB (62))
#define INSN3OP_0BU(MOP,SOP) (INSN3OP (MOP,SOP) | FIELDA (62) | (0x01 << 22))
#define INSN3OP_0LU(MOP,SOP) \
(INSN3OP (MOP,SOP) | FIELDA (62) | (0x01 << 22) | FIELDB (62))
#define INSN3OP_BBS(MOP,SOP) (INSN3OP (MOP,SOP) | (0x02 << 22))
#define INSN3OP_0LS(MOP,SOP) (INSN3OP (MOP,SOP) | (0x02 << 22) | FIELDB (62))
#define INSN3OP_CBBC(MOP,SOP) (INSN3OP (MOP,SOP) | (0x03 << 22))
#define INSN3OP_CBBL(MOP,SOP) (INSN3OP (MOP,SOP) | (0x03 << 22) | FIELDC (62))
#define INSN3OP_C0LC(MOP,SOP) (INSN3OP (MOP,SOP) | (0x03 << 22) | FIELDB (62))
#define INSN3OP_C0LL(MOP,SOP) \
(INSN3OP (MOP,SOP) | (0x03 << 22) | FIELDC (62) | FIELDB (62))
#define INSN3OP_CBBU(MOP,SOP) (INSN3OP (MOP,SOP) | (0x03 << 22) | (0x01 << 5))
#define INSN3OP_C0LU(MOP,SOP) \
(INSN3OP (MOP,SOP) | (0x03 << 22) | (0x01 << 5) | FIELDB (62))
#define MINSN3OP_ABC (~(FIELDF | FIELDA (63) | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_ALC (~(FIELDF | FIELDA (63) | FIELDC (63)))
#define MINSN3OP_ABL (~(FIELDF | FIELDA (63) | FIELDB (63)))
#define MINSN3OP_ALL (~(FIELDF | FIELDA (63)))
#define MINSN3OP_0BC (~(FIELDF | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_0LC (~(FIELDF | FIELDC (63)))
#define MINSN3OP_0BL (~(FIELDF | FIELDB (63)))
#define MINSN3OP_0LL (~(FIELDF))
#define MINSN3OP_ABU (~(FIELDF | FIELDA (63) | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_ALU (~(FIELDF | FIELDA (63) | FIELDC (63)))
#define MINSN3OP_0BU (~(FIELDF | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_0LU (~(FIELDF | FIELDC (63)))
#define MINSN3OP_BBS (~(FIELDF | FIELDA (63) | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_0LS (~(FIELDF | FIELDA (63) | FIELDC (63)))
#define MINSN3OP_CBBC (~(FIELDF | FIELDQ | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_CBBL (~(FIELDF | FIELDQ | FIELDB (63)))
#define MINSN3OP_C0LC (~(FIELDF | FIELDQ | FIELDC (63)))
#define MINSN3OP_C0LL (~(FIELDF | FIELDQ))
#define MINSN3OP_CBBU (~(FIELDF | FIELDQ | FIELDB (63) | FIELDC (63)))
#define MINSN3OP_C0LU (~(FIELDF | FIELDQ | FIELDC (63)))
#define INSN2OP_BC(MOP,SOP) (INSN2OP (MOP,SOP))
#define INSN2OP_BL(MOP,SOP) (INSN2OP (MOP,SOP) | FIELDC (62))
#define INSN2OP_0C(MOP,SOP) (INSN2OP (MOP,SOP) | FIELDB (62))
#define INSN2OP_0L(MOP,SOP) (INSN2OP (MOP,SOP) | FIELDB (62) | FIELDC (62))
#define INSN2OP_BU(MOP,SOP) (INSN2OP (MOP,SOP) | (0x01 << 22))
#define INSN2OP_0U(MOP,SOP) (INSN2OP (MOP,SOP) | (0x01 << 22) | FIELDB (62))
#define MINSN2OP_BC (~(FIELDF | FIELDB (63) | FIELDC (63)))
#define MINSN2OP_BL (~(FIELDF | FIELDB (63)))
#define MINSN2OP_0C (~(FIELDF | FIELDC (63)))
#define MINSN2OP_0L (~(FIELDF))
#define MINSN2OP_BU (~(FIELDF | FIELDB (63) | FIELDC (63)))
#define MINSN2OP_0U (~(FIELDF | FIELDC (63)))
#endif /* OPCODE_ARC_H */