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Implement BMI instructions.

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This commit is contained in:
H.J. Lu
2011-01-05 00:16:57 +00:00
parent e94277cb75
commit f12dc42220
17 changed files with 3371 additions and 2564 deletions
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35
opcodes/ChangeLog
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@ -1,3 +1,38 @@
2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (REG_VEX_38F3): New.
(PREFIX_0FBC): Likewise.
(PREFIX_VEX_38F2): Likewise.
(PREFIX_VEX_38F3_REG_1): Likewise.
(PREFIX_VEX_38F3_REG_2): Likewise.
(PREFIX_VEX_38F3_REG_3): Likewise.
(PREFIX_VEX_38F7): Likewise.
(VEX_LEN_38F2_P_0): Likewise.
(VEX_LEN_38F3_R_1_P_0): Likewise.
(VEX_LEN_38F3_R_2_P_0): Likewise.
(VEX_LEN_38F3_R_3_P_0): Likewise.
(VEX_LEN_38F7_P_0): Likewise.
(dis386_twobyte): Use PREFIX_0FBC.
(reg_table): Add REG_VEX_38F3.
(prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
(vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
PREFIX_VEX_38F7.
(vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
VEX_LEN_38F7_P_0.
* i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
(cpu_flags): Add CpuBMI.
* i386-opc.h (CpuBMI): New.
(i386_cpu_flags): Add cpubmi.
* i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (VexGdq): New.

84
opcodes/i386-dis.c
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@ -599,6 +599,7 @@ enum
REG_VEX_0F72,
REG_VEX_0F73,
REG_VEX_0FAE,
REG_VEX_0F38F3,
REG_XOP_LWPCB,
REG_XOP_LWP
};
@ -747,6 +748,7 @@ enum
PREFIX_0FAE_REG_2,
PREFIX_0FAE_REG_3,
PREFIX_0FB8,
PREFIX_0FBC,
PREFIX_0FBD,
PREFIX_0FC2,
PREFIX_0FC3,
@ -1015,6 +1017,11 @@ enum
PREFIX_VEX_0F38DD,
PREFIX_VEX_0F38DE,
PREFIX_VEX_0F38DF,
PREFIX_VEX_0F38F2,
PREFIX_VEX_0F38F3_REG_1,
PREFIX_VEX_0F38F3_REG_2,
PREFIX_VEX_0F38F3_REG_3,
PREFIX_VEX_0F38F7,
PREFIX_VEX_0F3A04,
PREFIX_VEX_0F3A05,
PREFIX_VEX_0F3A06,
@ -1298,6 +1305,11 @@ enum
VEX_LEN_0F38DD_P_2,
VEX_LEN_0F38DE_P_2,
VEX_LEN_0F38DF_P_2,
VEX_LEN_0F38F2_P_0,
VEX_LEN_0F38F3_R_1_P_0,
VEX_LEN_0F38F3_R_2_P_0,
VEX_LEN_0F38F3_R_3_P_0,
VEX_LEN_0F38F7_P_0,
VEX_LEN_0F3A06_P_2,
VEX_LEN_0F3A0A_P_2,
VEX_LEN_0F3A0B_P_2,
@ -2159,7 +2171,7 @@ static const struct dis386 dis386_twobyte[] = {
{ "ud1", { XX } },
{ REG_TABLE (REG_0FBA) },
{ "btcS", { Ev, Gv } },
{ "bsfS", { Gv, Ev } },
{ PREFIX_TABLE (PREFIX_0FBC) },
{ PREFIX_TABLE (PREFIX_0FBD) },
{ "movs{bR|x}", { Gv, Eb } },
{ "movs{wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
@ -2750,6 +2762,13 @@ static const struct dis386 reg_table[][8] = {
{ MOD_TABLE (MOD_VEX_0FAE_REG_2) },
{ MOD_TABLE (MOD_VEX_0FAE_REG_3) },
},
/* REG_VEX_0F38F3 */
{
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_1) },
{ PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_2) },
{ PREFIX_TABLE (PREFIX_VEX_0F38F3_REG_3) },
},
/* REG_XOP_LWPCB */
{
{ "llwpcb", { { OP_LWPCB_E, 0 } } },
@ -3070,6 +3089,13 @@ static const struct dis386 prefix_table[][4] = {
{ "popcntS", { Gv, Ev } },
},
/* PREFIX_0FBC */
{
{ "bsfS", { Gv, Ev } },
{ "tzcntS", { Gv, Ev } },
{ "bsfS", { Gv, Ev } },
},
/* PREFIX_0FBD */
{
{ "bsrS", { Gv, Ev } },
@ -4969,6 +4995,31 @@ static const struct dis386 prefix_table[][4] = {
{ VEX_LEN_TABLE (VEX_LEN_0F38DF_P_2) },
},
/* PREFIX_VEX_0F38F2 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38F2_P_0) },
},
/* PREFIX_VEX_0F38F3_REG_1 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38F3_R_1_P_0) },
},
/* PREFIX_VEX_0F38F3_REG_2 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38F3_R_2_P_0) },
},
/* PREFIX_VEX_0F38F3_REG_3 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38F3_R_3_P_0) },
},
/* PREFIX_VEX_0F38F7 */
{
{ VEX_LEN_TABLE (VEX_LEN_0F38F7_P_0) },
},
/* PREFIX_VEX_0F3A04 */
{
{ Bad_Opcode },
@ -7829,12 +7880,12 @@ static const struct dis386 vex_table[][256] = {
/* f0 */
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F38F2) },
{ REG_TABLE (REG_VEX_0F38F3) },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
{ PREFIX_TABLE (PREFIX_VEX_0F38F7) },
/* f8 */
{ Bad_Opcode },
{ Bad_Opcode },
@ -9034,6 +9085,31 @@ static const struct dis386 vex_len_table[][2] = {
{ VEX_W_TABLE (VEX_W_0F38DF_P_2) },
},
/* VEX_LEN_0F38F2_P_0 */
{
{ "andnS", { Gdq, VexGdq, Edq } },
},
/* VEX_LEN_0F38F3_R_1_P_0 */
{
{ "blsrS", { VexGdq, Edq } },
},
/* VEX_LEN_0F38F3_R_2_P_0 */
{
{ "blsmskS", { VexGdq, Edq } },
},
/* VEX_LEN_0F38F3_R_3_P_0 */
{
{ "blsiS", { VexGdq, Edq } },
},
/* VEX_LEN_0F38F7_P_0 */
{
{ "bextrS", { Gdq, Edq, VexGdq } },
},
/* VEX_LEN_0F3A06_P_2 */
{
{ Bad_Opcode },

3
opcodes/i386-gen.c
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@ -140,6 +140,8 @@ static initializer cpu_flag_init[] =
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuABM|CpuAVX|CpuFMA4|CpuXOP" },
{ "CPU_LWP_FLAGS",
"CpuLWP" },
{ "CPU_BMI_FLAGS",
"CpuBMI" },
{ "CPU_MOVBE_FLAGS",
"CpuMovbe" },
{ "CPU_RDTSCP_FLAGS",
@ -320,6 +322,7 @@ static bitfield cpu_flags[] =
BITFIELD (CpuFMA4),
BITFIELD (CpuXOP),
BITFIELD (CpuLWP),
BITFIELD (CpuBMI),
BITFIELD (CpuLM),
BITFIELD (CpuMovbe),
BITFIELD (CpuEPT),

137
opcodes/i386-init.h
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@ -1,5 +1,5 @@
/* This file is automatically generated by i386-gen. Do not edit! */
/* Copyright 2007, 2008, 2009, 2010
/* Copyright 2007, 2008, 2009, 2010, 2011
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@ -22,322 +22,327 @@
#define CPU_UNKNOWN_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 0, 1, 1 } }
1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } }
#define CPU_GENERIC32_FLAGS \
{ { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_GENERIC64_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_NONE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_I186_FLAGS \
{ { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_I286_FLAGS \
{ { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_I386_FLAGS \
{ { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_I486_FLAGS \
{ { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_I586_FLAGS \
{ { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_I686_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_PENTIUMPRO_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_P2_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_P3_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_P4_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_NOCONA_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_CORE_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_CORE2_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_COREI7_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_K6_FLAGS \
{ { 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_K6_2_FLAGS \
{ { 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_ATHLON_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_K8_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_AMDFAM10_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_BDVER1_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
0, 1, 0, 0, 0, 1, 0, 0, 0 } }
0, 0, 1, 0, 0, 0, 1, 0, 0, 0 } }
#define CPU_8087_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_287_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_387_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_ANY87_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_CLFLUSH_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_NOP_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SYSCALL_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_MMX_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSE2_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSE3_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSSE3_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSE4_1_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSE4_2_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_ANY_SSE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_VMX_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SMX_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_XSAVE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_XSAVEOPT_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_AES_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_PCLMUL_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_FMA_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_FMA4_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_XOP_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_LWP_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_BMI_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_MOVBE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_RDTSCP_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 1, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_EPT_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_FSGSBASE_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 1, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }
#define CPU_RDRND_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 1, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 1, 0, 0, 0, 0, 0 } }
#define CPU_F16C_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 1, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 1, 0, 0, 0, 0 } }
#define CPU_3DNOW_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_3DNOWA_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_PADLOCK_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SVME_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_SSE4A_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_ABM_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_AVX_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \
0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_ANY_AVX_FLAGS \
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0 } }
0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
#define CPU_L1OM_FLAGS \
{ { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 0, 1, 1 } }
1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } }
#define OPERAND_TYPE_NONE \

3
opcodes/i386-opc.h
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@ -110,6 +110,8 @@ enum
CpuXOP,
/* LWP support required */
CpuLWP,
/* BMI support required */
CpuBMI,
/* MOVBE Instruction support required */
CpuMovbe,
/* EPT Instructions required */
@ -186,6 +188,7 @@ typedef union i386_cpu_flags
unsigned int cpufma4:1;
unsigned int cpuxop:1;
unsigned int cpulwp:1;
unsigned int cpubmi:1;
unsigned int cpumovbe:1;
unsigned int cpuept:1;
unsigned int cpurdtscp:1;

9
opcodes/i386-opc.tbl
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@ -2733,6 +2733,15 @@ lwpval, 3, 0x12, 0x1, 1, CpuLWP, Modrm|VexOpcode=5|VexW=2|IgnoreSize|No_bSuf|No_
lwpins, 3, 0x12, 0x0, 1, CpuLWP, Modrm|VexOpcode=5|VexW=1|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VexVVVV=3|Vex, { Imm32|Imm32S, Dword|Reg32|Disp8|Disp16|Disp32|Disp32S|Unspecified|BaseIndex, Reg32 }
lwpins, 3, 0x12, 0x0, 1, CpuLWP, Modrm|VexOpcode=5|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|VexVVVV=3|NoRex64|Vex, { Imm32|Imm32S, Dword|Reg32|Disp8|Disp16|Disp32|Disp32S|Unspecified|BaseIndex, Reg64 }
// BMI instructions
andn, 3, 0xf2, None, 1, CpuBMI, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
bextr, 3, 0xf7, None, 1, CpuBMI, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
blsi, 2, 0xf3, 0x3, 1, CpuBMI, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=2|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
blsmsk, 2, 0xf3, 0x2, 1, CpuBMI, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=2|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
blsr, 2, 0xf3, 0x1, 1, CpuBMI, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=2|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
tzcnt, 2, 0xf30fbc, None, 2, CpuBMI, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
// AMD 3DNow! instructions.
prefetch, 1, 0xf0d, 0x0, 2, Cpu3dnow, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Byte|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }

5036
opcodes/i386-tbl.h
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