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* arc-tdep.c: #include "gdbcmd.h".
(codestream_seek): Pass CORE_ADDR. (arc_cpu_type, tmp_arc_cpu_type, arc_cpu_type_table): New globals. (debug_pipeline_p): Likewise. (X_...): Instruction field access macros. (BUILD_INSN): Define. (codestream_tell): Allow for stream elements > 1 byte. (codestream_fill): Likewise. (setup_prologue_scan): New function. (arc_get_frame_setup): Call it. Update to current spec regarding prologues. Use BUILD_INSN. (skip_prologue): New argument `frameless_p'. Use BUILD_INSN. (arc_frame_saved_pc): New function. (frame_find_saved_regs): Use BUILD_INSN. (get_insn_type, single_step): New functions. (one_stepped): New global. (arc_set_cpu_type_command, arc_show_cpu_type_command): New functions. (arc_set_cpu_type): New function. (_initialize_arc_tdep): Define new `set' commands `cpu', `displaypipeline', and `debugpipeline'. * remote-arc.c (break_insn): Add bi-endian support. (arc_insert_breakpoint): Likewise. (arc_remove_breakpoint): Likewise. (switch_command): Delete. * arc/tm-arc.h (TARGET_BYTE_ORDER): Delete. (TARGET_BYTE_ORDER_SELECTABLE): Define. (DEFAULT_ARC_CPU_TYPE): Define. (SKIP_PROLOGUE_FRAMELESS_P): Define. (BREAKPOINT): Delete. (BIG_BREAKPOINT, LITTLE_BREAKPOINT): Define. (DECR_PC_AFTER_BREAK): Change to 8. (NO_SINGLE_STEP): Define. (ARC_PC_TO_REAL_ADDRESS): Define. (SAVED_PC_AFTER_CALL): Use it. (NUM_REGS, REGISTER_BYTES): Fix. (FRAME_SAVED_PC): Call arc_frame_saved_pc. (FRAME_LOCALS_ADDRESS): Fix.
This commit is contained in:
@ -1,6 +1,6 @@
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/* Parameters for target machine ARC, for GDB, the GNU debugger.
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Copyright (C) 1995 Free Software Foundation, Inc.
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Contributed by Cygnus Support Corporation.
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Contributed by Cygnus Support.
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This file is part of GDB.
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@ -18,8 +18,11 @@ You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* Byte order is configurable, but this machine runs little-endian. */
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#define TARGET_BYTE_ORDER LITTLE_ENDIAN
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/* Used by arc-tdep.c to set the default cpu type. */
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#define DEFAULT_ARC_CPU_TYPE "base"
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/* Byte order is selectable. */
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#define TARGET_BYTE_ORDER_SELECTABLE
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/* We have IEEE floating point, if we have any float at all. */
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#define IEEE_FLOAT
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@ -28,31 +31,61 @@ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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Zero on most machines. */
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#define FUNCTION_START_OFFSET 0
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/* Advance pc across any function entry prologue instructions
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to reach some "real" code. */
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/* Advance PC across any function entry prologue instructions
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to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances
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the PC past some of the prologue, but stops as soon as it
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knows that the function has a frame. Its result is equal
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to its input PC if the function is frameless, unequal otherwise. */
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#define SKIP_PROLOGUE(pc) { pc = skip_prologue (pc); }
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extern CORE_ADDR skip_prologue ();
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#define SKIP_PROLOGUE(pc) \
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{ pc = skip_prologue (pc, 0); }
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#define SKIP_PROLOGUE_FRAMELESS_P(pc) \
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{ pc = skip_prologue (pc, 1); }
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extern CORE_ADDR skip_prologue PARAMS ((CORE_ADDR, int));
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/* Sequence of bytes for breakpoint instruction. */
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#define BREAKPOINT {0x01, 0x80, 0xbe, 0x1f}
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/* Sequence of bytes for breakpoint instruction.
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??? The current value is "sr -1,[-1]" and is for the simulator only.
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The simulator watches for this and does the right thing.
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The hardware version will have to associate with each breakpoint
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the sequence "flag 1; nop; nop; nop". IE: The breakpoint insn will not
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be a fixed set of bits but instead will be a branch to a semi-random
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address. Presumably this will be cleaned up for "second silicon". */
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#define BIG_BREAKPOINT { 0x12, 0x1f, 0xff, 0xff }
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#define LITTLE_BREAKPOINT { 0xff, 0xff, 0x1f, 0x12 }
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#define DECR_PC_AFTER_BREAK 4
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/* ??? This value may eventually be correct (if/when proper breakpoints
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are added). Until then no value is correct so leave as is and cope. */
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#define DECR_PC_AFTER_BREAK 8
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/* We don't have a reliable single step facility.
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??? We do have a cycle single step facility, but that won't work. */
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#define NO_SINGLE_STEP
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extern int one_stepped;
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extern void single_step PARAMS ((int));
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/* Given a pc value as defined by the hardware, return the real address.
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Remember that on the ARC blink contains that status register which
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includes PC + flags (so we have to mask out the flags). */
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#define ARC_PC_TO_REAL_ADDRESS(pc) (((pc) & 0xffffff) << 2)
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/* Immediately after a function call, return the saved pc.
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Can't always go through the frames for this because on some machines
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the new frame is not set up until the new function
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executes some instructions. */
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#define SAVED_PC_AFTER_CALL(frame) (read_register (BLINK_REGNUM))
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#define SAVED_PC_AFTER_CALL(frame) \
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(ARC_PC_TO_REAL_ADDRESS (read_register (BLINK_REGNUM)))
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/* Stack grows upward */
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#define INNER_THAN <
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/* Nonzero if instruction at pc is a return instruction. */
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/* Nonzero if instruction at pc is a return instruction.
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This is the "j [blink]" insn (with or without conditionals or delay
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slots). */
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#define ABOUT_TO_RETURN(pc) (read_memory_integer(pc,4) == 0x380f8000)
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#define ABOUT_TO_RETURN(pc) \
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((read_memory_integer(pc, 4) & 0xffffff80) == 0x380f8000)
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/* Say how long (ordinary) registers are. This is a piece of bogosity
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used in push_word and a few other places; REGISTER_RAW_SIZE is the
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@ -60,7 +93,7 @@ extern CORE_ADDR skip_prologue ();
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#define REGISTER_SIZE 4
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/* Number of machine registers */
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#define NUM_REGS 91
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#define NUM_REGS 92
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/* Initializer for an array of names of registers.
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There should be NUM_REGS strings in this initializer. */
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@ -97,6 +130,11 @@ extern CORE_ADDR skip_prologue ();
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#define AUX_BEG_REGNUM 61 /* aux reg begins */
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#define AUX_END_REGNUM 90 /* aux reg ends, pc not real aux reg */
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/* Fake registers used to mark immediate data. */
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#define SHIMM_FLAG_REGNUM 61
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#define LIMM_REGNUM 62
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#define SHIMM_REGNUM 63
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#define AUX_REG_MAP \
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{ \
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{ 0, 1, 2, 3, 4, 5, \
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@ -129,7 +167,7 @@ extern CORE_ADDR skip_prologue ();
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/* Total amount of space needed to store our copies of the machine's
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register state, the array `registers'. */
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#define REGISTER_BYTES (91*4)
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#define REGISTER_BYTES (NUM_REGS * 4)
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/* Index within `registers' of the first byte of the space for register N. */
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#define REGISTER_BYTE(N) (4*(N))
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@ -165,7 +203,7 @@ extern CORE_ADDR skip_prologue ();
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this is also an argument. This is used in call_function to build a
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stack, and in value_being_returned to print return values.
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On arc, a structure is always retunred with pointer in r??. */
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On arc, a structure is always retunred with pointer in r0. */
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#define USE_STRUCT_CONVENTION(gcc_p, type) 1
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@ -199,11 +237,6 @@ extern CORE_ADDR skip_prologue ();
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/* Describe the pointer in each stack frame to the previous stack frame
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(its caller). */
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/* FRAME_CHAIN takes a frame's nominal address
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and produces the frame's chain-pointer.
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However, if FRAME_CHAIN_VALID returns zero,
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it means the given frame is the outermost one and has no caller. */
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/* We cache information about saved registers in the frame structure,
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to save us from having to re-scan function prologues every time
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a register in a non-current frame is accessed. */
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@ -221,17 +254,20 @@ extern CORE_ADDR skip_prologue ();
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#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
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((fi)->fsr = 0, (fi)->arg_pointer = -1)
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/* FRAME_CHAIN takes a frame's nominal address
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and produces the frame's chain-pointer.
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However, if FRAME_CHAIN_VALID returns zero,
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it means the given frame is the outermost one and has no caller. */
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/* On the arc, we get the chain pointer by reading the PFP saved
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on the stack. */
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/* the PFP and RPC is in fp and fp+4. or it is in fp+4 and fp+8 ??? */
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/* The PFP and RPC is in fp and fp+4. */
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#define FRAME_CHAIN(thisframe) \
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(read_memory_integer (FRAME_FP(thisframe), 4))
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(read_memory_integer (FRAME_FP (thisframe), 4))
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/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
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and has no caller.
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#define FRAME_CHAIN_VALID(thisframe) \
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1
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and has no caller. */
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#define FRAME_CHAIN_VALID(chain, thisframe) ((chain) != 0)
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/* A macro that tells us whether the function invocation represented
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by FI does not have a frame on the stack associated with it. If it
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@ -242,24 +278,28 @@ extern CORE_ADDR skip_prologue ();
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if ((FI)->signal_handler_caller) \
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(FRAMELESS) = 0; \
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else \
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(FRAMELESS) = frameless_look_for_prologue(FI); \
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(FRAMELESS) = frameless_look_for_prologue (FI); \
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} while (0)
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#define FRAME_SAVED_PC(frame) \
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(read_memory_integer(FRAME_CHAIN(frame)+8,4))
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/* Where is the PC for a specific frame.
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A leaf function may never save blink, so we have to check for that here. */
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/* On the ARC, FRAME_ARGS_ADDRESS should return the value of
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g14 as passed into the frame, if known. We need a function for this.
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#define FRAME_SAVED_PC(frame) (arc_frame_saved_pc (frame))
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struct frame_info; /* in case frame.h not included yet */
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CORE_ADDR arc_frame_saved_pc PARAMS ((struct frame_info *));
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/* If the argument is on the stack, it will be here.
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We cache this value in the frame info if we've already looked it up. */
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/* ??? Is the arg_pointer check necessary? */
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#define FRAME_ARGS_ADDRESS(fi) \
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(((fi)->arg_pointer != -1)? (fi)->arg_pointer: (fi)->frame + 4)
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#define FRAME_ARGS_ADDRESS(fi) \
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(((fi)->arg_pointer != -1) ? (fi)->arg_pointer : (fi)->frame)
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/* This is the same except it should return 0 when
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it does not really know where the args are, rather than guessing.
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This value is not cached since it is only used infrequently. */
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#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame + 4
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#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
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/* Set NUMARGS to the number of args passed to a frame.
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Can return -1, meaning no way to tell. */
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