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* cpu-mn10x00.c, elf32-mn10x00.c: New files.

Browse Source 
* Makefile.in (ALL_MACHINES): Add cpu-mn10x00.o.
        (BFD32_BACKENDS): Similarly for elf32-mn10x00.o.
        (elf32-mn10x00.o): Add dependencies.
        * archures.c (enum bfd_architecture): Add bfd_arch_mn10x00.
        (bfd_mn10x00_arch): Declare.
        (bfd_archures_list): Add bfd_mn10x00_arch.
        * config.bfd: Add mn10x00-*-*.
        * configure.in: Add bfd_elf32_mn10x00_vec.
        * elf.c (prep_headers): Handle bfd_arch_mn10x00.
        * targets.c (bfd_elf32_mn10x00_vec): Declare.
        (bfd_target_vector): Add bfd_elf32_mn10x00_vec.
        * bfd-in2.h, configure: Rebuilt.
Stubbing out Matsushita support.
This commit is contained in:
Jeff Law
1996-10-03 03:56:20 +00:00
parent 3072af43b0
commit efc2b06463
12 changed files with 282 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
bfd/.Sanitize
View File

@ -137,6 +137,7 @@ cpu-i960.c
cpu-m68k.c
cpu-m88k.c
cpu-mips.c
cpu-mn10x00.c
cpu-ns32k.c
cpu-powerpc.c
cpu-rs6000.c
@ -162,6 +163,7 @@ elf32-i860.c
elf32-m68k.c
elf32-m88k.c
elf32-mips.c
elf32-mn10x00.c
elf32-ppc.c
elf32-sh.c
elf32-sparc.c

16
bfd/ChangeLog
View File

@ -1,3 +1,19 @@
Wed Oct 2 21:40:55 1996 Jeffrey A Law (law@cygnus.com)
* cpu-mn10x00.c, elf32-mn10x00.c: New files.
* Makefile.in (ALL_MACHINES): Add cpu-mn10x00.o.
(BFD32_BACKENDS): Similarly for elf32-mn10x00.o.
(elf32-mn10x00.o): Add dependencies.
* archures.c (enum bfd_architecture): Add bfd_arch_mn10x00.
(bfd_mn10x00_arch): Declare.
(bfd_archures_list): Add bfd_mn10x00_arch.
* config.bfd: Add mn10x00-*-*.
* configure.in: Add bfd_elf32_mn10x00_vec.
* elf.c (prep_headers): Handle bfd_arch_mn10x00.
* targets.c (bfd_elf32_mn10x00_vec): Declare.
(bfd_target_vector): Add bfd_elf32_mn10x00_vec.
* bfd-in2.h, configure: Rebuilt.
Wed Oct 2 15:46:45 1996 Klaus Kaempf <kkaempf@progis.de>
openVMS/Alpha: Provide filename and case_hack flags via

8
bfd/Makefile.in
View File

@ -131,6 +131,7 @@ ALL_MACHINES = \
cpu-m68k.o \
cpu-m88k.o \
cpu-mips.o \
cpu-mn10x00.o \
cpu-ns32k.o \
cpu-powerpc.o \
cpu-rs6000.o \
@ -218,6 +219,7 @@ BFD32_BACKENDS = \
elf32-m68k.o \
elf32-m88k.o \
elf32-mips.o \
elf32-mn10x00.o \
elf32-ppc.o \
elf32-sh.o \
elf32-sparc.o \
@ -822,9 +824,13 @@ end-sanitize-d10v:
start-sanitize-m32r:
elf32-m32r.o: elf32-m32r.c elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
$(INCDIR)/elf/m32r.h elf32-target.h
elf32-target.h
end-sanitize-m32r:
elf32-mn10x00.o: elf32-mn10x00.c elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
elf32-target.h
start-sanitize-v850:
cpu-v850.o: cpu-v850.c
elf32-v850.o: elf32-v850.c $(INCDIR)/bfdlink.h elf-bfd.h \

30
bfd/archures.c
View File

@ -121,6 +121,9 @@ DESCRIPTION
. bfd_arch_powerpc, {* PowerPC *}
. bfd_arch_rs6000, {* IBM RS/6000 *}
. bfd_arch_hppa, {* HP PA RISC *}
. {* start-sanitize-d10v *}
. bfd_arch_d10v, {* Mitsubishi D10V *}
. {* end-sanitize-d10v *}
. bfd_arch_z8k, {* Zilog Z8000 *}
.#define bfd_mach_z8001 1
.#define bfd_mach_z8002 2
@ -130,6 +133,9 @@ DESCRIPTION
. bfd_arch_arm, {* Advanced Risc Machines ARM *}
. bfd_arch_ns32k, {* National Semiconductors ns32000 *}
. bfd_arch_w65, {* WDC 65816 *}
. {* start-sanitize-v850 *}
. bfd_arch_v850, {* NEC V850 *}
. {* end-sanitize-v850 *}
. {* start-sanitize-arc *}
. bfd_arch_arc, {* Argonaut RISC Core *}
.#define bfd_mach_arc_base 0
@ -137,6 +143,10 @@ DESCRIPTION
.#define bfd_mach_arc_graphics 2
.#define bfd_mach_arc_audio 3
. {* end-sanitize-arc *}
. {* start-sanitize-m32r *}
. bfd_arch_m32r, {* Mitsubishi M32R *}
. {* end-sanitize-m32r *}
. bfd_arch_mn10x00, {* Matsushita MN10x00 *}
. bfd_arch_last
. };
@ -181,15 +191,22 @@ extern const bfd_arch_info_type bfd_alpha_arch;
extern const bfd_arch_info_type bfd_arc_arch;
/* end-sanitize-arc */
extern const bfd_arch_info_type bfd_arm_arch;
/* start-sanitize-d10v */
extern const bfd_arch_info_type bfd_d10v_arch;
/* end-sanitize-d10v */
extern const bfd_arch_info_type bfd_h8300_arch;
extern const bfd_arch_info_type bfd_h8500_arch;
extern const bfd_arch_info_type bfd_hppa_arch;
extern const bfd_arch_info_type bfd_i386_arch;
extern const bfd_arch_info_type bfd_i860_arch;
extern const bfd_arch_info_type bfd_i960_arch;
/* start-sanitize-m32r */
extern const bfd_arch_info_type bfd_m32r_arch;
/* end-sanitize-m32r */
extern const bfd_arch_info_type bfd_m68k_arch;
extern const bfd_arch_info_type bfd_m88k_arch;
extern const bfd_arch_info_type bfd_mips_arch;
extern const bfd_arch_info_type bfd_mn10x00_arch;
extern const bfd_arch_info_type bfd_powerpc_arch;
extern const bfd_arch_info_type bfd_rs6000_arch;
extern const bfd_arch_info_type bfd_sh_arch;
@ -199,6 +216,9 @@ extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
extern const bfd_arch_info_type bfd_ns32k_arch;
extern const bfd_arch_info_type bfd_w65_arch;
/* start-sanitize-v850 */
extern const bfd_arch_info_type bfd_v850_arch;
/* end-sanitize-v850 */
static const bfd_arch_info_type * const bfd_archures_list[] =
{
@ -211,15 +231,22 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_arc_arch,
/* end-sanitize-arc */
&bfd_arm_arch,
/* start-sanitize-d10v */
&bfd_d10v_arch,
/* end-sanitize-d10v */
&bfd_h8300_arch,
&bfd_h8500_arch,
&bfd_hppa_arch,
&bfd_i386_arch,
&bfd_i860_arch,
&bfd_i960_arch,
/* start-sanitize-m32r */
&bfd_m32r_arch,
/* end-sanitize-m32r */
&bfd_m68k_arch,
&bfd_m88k_arch,
&bfd_mips_arch,
&bfd_mn10x00_arch,
&bfd_powerpc_arch,
&bfd_rs6000_arch,
&bfd_sh_arch,
@ -229,6 +256,9 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_z8k_arch,
&bfd_ns32k_arch,
&bfd_w65_arch,
/* start-sanitize-v850*/
&bfd_v850_arch,
/* end-sanitize-v850 */
#endif
0
};

23
bfd/bfd-in2.h
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@ -1146,7 +1146,7 @@ boolean
bfd_copy_private_section_data PARAMS ((bfd *ibfd, asection *isec, bfd *obfd, asection *osec));
#define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
BFD_SEND (ibfd, _bfd_copy_private_section_data, \
BFD_SEND (obfd, _bfd_copy_private_section_data, \
(ibfd, isection, obfd, osection))
enum bfd_architecture
{
@ -1229,6 +1229,7 @@ enum bfd_architecture
/* start-sanitize-m32r */
bfd_arch_m32r, /* Mitsubishi M32R */
/* end-sanitize-m32r */
bfd_arch_mn10x00, /* Matsushita MN10x00 */
bfd_arch_last
};
@ -1835,17 +1836,17 @@ assumed to be 0. */
/* start-sanitize-m32r */
/* Mitsubishi M32R relocs.
This is a 10-bit reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_10_PCREL,
This is a 24 bit address. */
BFD_RELOC_M32R_UIMM24,
/* This is a 10-bit reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_DISP8,
/* This is an 18-bit reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_18_PCREL,
BFD_RELOC_M32R_DISP16,
/* This is an 26-bit reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_26_PCREL,
/* This is a 24 bit reloc. */
BFD_RELOC_M32R_24,
BFD_RELOC_M32R_DISP24,
/* end-sanitize-m32r */
/* start-sanitize-v850 */
@ -2014,7 +2015,7 @@ boolean
bfd_copy_private_symbol_data PARAMS ((bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym));
#define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
BFD_SEND (ibfd, _bfd_copy_private_symbol_data, \
BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
(ibfd, isymbol, obfd, osymbol))
struct _bfd
{
@ -2254,13 +2255,13 @@ boolean
bfd_copy_private_bfd_data PARAMS ((bfd *ibfd, bfd *obfd));
#define bfd_copy_private_bfd_data(ibfd, obfd) \
BFD_SEND (ibfd, _bfd_copy_private_bfd_data, \
BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
(ibfd, obfd))
boolean
bfd_merge_private_bfd_data PARAMS ((bfd *ibfd, bfd *obfd));
#define bfd_merge_private_bfd_data(ibfd, obfd) \
BFD_SEND (ibfd, _bfd_merge_private_bfd_data, \
BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
(ibfd, obfd))
boolean
bfd_set_private_flags PARAMS ((bfd *abfd, flagword flags));

4
bfd/config.bfd
View File

@ -393,6 +393,10 @@ case "${targ}" in
targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
;;
mn10x00-*-*)
targ_defvec=bfd_elf32_mn10x00_vec
;;
ns32k-pc532-mach* | ns32k-pc532-ux*)
targ_defvec=pc532machaout_vec
targ_underscore=yes

19
bfd/configure vendored
View File

@ -1923,10 +1923,16 @@ do
bfd_elf32_littlemips_vec) tb="$tb elf32-mips.o elf32.o $elf ecofflink.o" ;;
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.o elf64.o elf32-mips.o elf32.o $elf ecofflink.o"
target64=true ;;
# start-sanitize-m32r
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.o elf32.o $elf" ;;
# end-sanitize-m32r
bfd_elf32_m68k_vec) tb="$tb elf32-m68k.o elf32.o $elf" ;;
bfd_elf32_m88k_vec) tb="$tb elf32-m88k.o elf32.o $elf" ;;
bfd_elf32_mn10x00_vec) tb="$tb elf32-mn10x00.o elf32.o $elf" ;;
bfd_elf32_powerpc_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
bfd_elf32_powerpcle_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
bfd_elf32_sh_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
bfd_elf32_shl_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.o elf32.o $elf" ;;
# start-sanitize-v850
bfd_elf32_v850_vec) tb="$tb elf32-v850.o elf32.o $elf" ;;
@ -1997,6 +2003,7 @@ do
shcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
shlcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
som_vec) tb="$tb som.o" ;;
sparcle_aout_vec) tb="$tb aout-sparcle.o aout32.o" ;;
sparclynx_aout_vec) tb="$tb sparclynx.o lynx-core.o aout32.o" ;;
sparclynx_coff_vec) tb="$tb cf-sparclynx.o lynx-core.o" ;;
sparcnetbsd_vec) tb="$tb sparcnetbsd.o aout32.o" ;;
@ -2086,7 +2093,7 @@ if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 2090 "configure"
#line 2096 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -2110,7 +2117,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:2114: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
if { (eval echo configure:2120: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@ -2140,7 +2147,7 @@ else
ac_cv_func_mmap=no
else
cat > conftest.$ac_ext <<EOF
#line 2144 "configure"
#line 2150 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test. */
@ -2209,7 +2216,7 @@ main()
}
EOF
{ (eval echo configure:2213: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
{ (eval echo configure:2219: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }
if test -s conftest && (./conftest; exit) 2>/dev/null; then
ac_cv_func_mmap=yes
else
@ -2234,7 +2241,7 @@ if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 2238 "configure"
#line 2244 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -2258,7 +2265,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:2262: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
if { (eval echo configure:2268: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else

7
bfd/configure.in
View File

@ -451,10 +451,16 @@ do
bfd_elf32_littlemips_vec) tb="$tb elf32-mips.o elf32.o $elf ecofflink.o" ;;
bfd_elf64_littlemips_vec) tb="$tb elf64-mips.o elf64.o elf32-mips.o elf32.o $elf ecofflink.o"
target64=true ;;
# start-sanitize-m32r
bfd_elf32_m32r_vec) tb="$tb elf32-m32r.o elf32.o $elf" ;;
# end-sanitize-m32r
bfd_elf32_m68k_vec) tb="$tb elf32-m68k.o elf32.o $elf" ;;
bfd_elf32_m88k_vec) tb="$tb elf32-m88k.o elf32.o $elf" ;;
bfd_elf32_mn10x00_vec) tb="$tb elf32-mn10x00.o elf32.o $elf" ;;
bfd_elf32_powerpc_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
bfd_elf32_powerpcle_vec) tb="$tb elf32-ppc.o elf32.o $elf" ;;
bfd_elf32_sh_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
bfd_elf32_shl_vec) tb="$tb elf32-sh.o elf32.o $elf coff-sh.o" ;;
bfd_elf32_sparc_vec) tb="$tb elf32-sparc.o elf32.o $elf" ;;
# start-sanitize-v850
bfd_elf32_v850_vec) tb="$tb elf32-v850.o elf32.o $elf" ;;
@ -525,6 +531,7 @@ do
shcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
shlcoff_vec) tb="$tb coff-sh.o cofflink.o" ;;
som_vec) tb="$tb som.o" ;;
sparcle_aout_vec) tb="$tb aout-sparcle.o aout32.o" ;;
sparclynx_aout_vec) tb="$tb sparclynx.o lynx-core.o aout32.o" ;;
sparclynx_coff_vec) tb="$tb cf-sparclynx.o lynx-core.o" ;;
sparcnetbsd_vec) tb="$tb sparcnetbsd.o aout32.o" ;;

54
bfd/cpu-mn10x00.c Executable file
View File

@ -0,0 +1,54 @@
/* BFD support for the Matsushita 10200 and 10300 processors
Copyright 1996 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_mn10200_arch =
{
16, /* 16 bits in a word */
24, /* 16 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_mn10x00,
200,
"mn10x00",
"mn10200",
2,
true, /* the one and only */
bfd_default_compatible,
bfd_default_scan ,
0,
};
const bfd_arch_info_type bfd_mn10x00_arch =
{
16,
24,
8,
bfd_arch_mn10x00,
300,
"mn10x00",
"mn10300",
2,
false,
bfd_default_compatible,
bfd_default_scan,
&bfd_mn10200_arch
};

7
bfd/elf.c
View File

@ -2525,6 +2525,9 @@ prep_headers (abfd)
i_ehdrp->e_machine = EM_CYGNUS_M32R;
break;
/* end-sanitize-m32r */
case bfd_arch_mn10x00:
i_ehdrp->e_machine = EM_CYGNUS_MN10x00;
break;
/* also note that EM_M32, AT&T WE32100 is unknown to bfd */
default:
i_ehdrp->e_machine = EM_NONE;
@ -2930,6 +2933,10 @@ _bfd_elf_copy_private_symbol_data (ibfd, isymarg, obfd, osymarg)
{
elf_symbol_type *isym, *osym;
if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
|| bfd_get_flavour (obfd) != bfd_target_elf_flavour)
return true;
isym = elf_symbol_from (ibfd, isymarg);
osym = elf_symbol_from (obfd, osymarg);

111
bfd/elf32-mn10x00.c Normal file
View File

@ -0,0 +1,111 @@
/* Matsushita 10200 and 10300 specific support for 32-bit ELF
Copyright (C) 1994, 1995 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
#include "elf-bfd.h"
static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
static void mn10x00_info_to_howto_rel
PARAMS ((bfd *, arelent *, Elf32_Internal_Rel *));
/* Try to minimize the amount of space occupied by relocation tables
on the ROM (not that the ROM won't be swamped by other ELF overhead). */
#define USE_REL
enum reloc_type
{
R_MN10x00_NONE = 0,
R_MN10x00_MAX
};
static reloc_howto_type elf_mn10x00_howto_table[] =
{
/* */
HOWTO (R_MN10x00_NONE,
0,
2,
16,
false,
0,
complain_overflow_bitfield,
bfd_elf_generic_reloc,
"R_MN10x00_NONE",
false,
0,
0,
false),
};
struct mn10x00_reloc_map
{
unsigned char bfd_reloc_val;
unsigned char elf_reloc_val;
};
static const struct mn10x00_reloc_map mn10x00_reloc_map[] =
{
{ BFD_RELOC_NONE, R_MN10x00_NONE, },
};
static reloc_howto_type *
bfd_elf32_bfd_reloc_type_lookup (abfd, code)
bfd *abfd;
bfd_reloc_code_real_type code;
{
unsigned int i;
for (i = 0;
i < sizeof (mn10x00_reloc_map) / sizeof (struct mn10x00_reloc_map);
i++)
{
if (mn10x00_reloc_map[i].bfd_reloc_val == code)
return &elf_mn10x00_howto_table[mn10x00_reloc_map[i].elf_reloc_val];
}
return NULL;
}
/* Set the howto pointer for an V850 ELF reloc. */
static void
mn10x00_info_to_howto_rel (abfd, cache_ptr, dst)
bfd *abfd;
arelent *cache_ptr;
Elf32_Internal_Rel *dst;
{
unsigned int r_type;
r_type = ELF32_R_TYPE (dst->r_info);
BFD_ASSERT (r_type < (unsigned int) R_MN10x00_MAX);
cache_ptr->howto = &elf_mn10x00_howto_table[r_type];
}
#define TARGET_LITTLE_SYM bfd_elf32_mn10x00_vec
#define TARGET_LITTLE_NAME "elf32-mn10x00"
#define ELF_ARCH bfd_arch_mn10x00
#define ELF_MACHINE_CODE EM_CYGNUS_MN10x00
#define ELF_MAXPAGESIZE 0x1000
#define elf_info_to_howto 0
#define elf_info_to_howto_rel mn10x00_info_to_howto_rel
#include "elf32-target.h"

20
bfd/targets.c
View File

@ -179,7 +179,7 @@ The order of bytes within the header parts of a file.
. enum bfd_endian header_byteorder;
A mask of all the flags which an executable may have set -
from the set <<NO_FLAGS>>, <<HAS_RELOC>>, ...<<D_PAGED>>.
from the set <<BFD_NO_FLAGS>>, <<HAS_RELOC>>, ...<<D_PAGED>>.
. flagword object_flags;
@ -498,11 +498,20 @@ extern const bfd_target bfd_elf32_i860_vec;
extern const bfd_target bfd_elf32_little_generic_vec;
extern const bfd_target bfd_elf32_littlemips_vec;
extern const bfd_target bfd_elf64_littlemips_vec;
/* start-sanitize-m32r */
extern const bfd_target bfd_elf32_m32r_vec;
/* end-sanitize-m32r */
extern const bfd_target bfd_elf32_m68k_vec;
extern const bfd_target bfd_elf32_m88k_vec;
extern const bfd_target bfd_elf32_mn10x00_vec;
extern const bfd_target bfd_elf32_powerpc_vec;
extern const bfd_target bfd_elf32_powerpcle_vec;
extern const bfd_target bfd_elf32_sh_vec;
extern const bfd_target bfd_elf32_shl_vec;
extern const bfd_target bfd_elf32_sparc_vec;
/* start-sanitize-v850 */
extern const bfd_target bfd_elf32_v850_vec;
/* end-sanitize-v850 */
extern const bfd_target bfd_elf64_big_generic_vec;
extern const bfd_target bfd_elf64_little_generic_vec;
extern const bfd_target bfd_elf64_sparc_vec;
@ -564,6 +573,7 @@ extern const bfd_target pmac_xcoff_vec;
extern const bfd_target rs6000coff_vec;
extern const bfd_target shcoff_vec;
extern const bfd_target shlcoff_vec;
extern const bfd_target sparcle_aout_vec;
extern const bfd_target sparclynx_aout_vec;
extern const bfd_target sparclynx_coff_vec;
extern const bfd_target sparcnetbsd_vec;
@ -651,10 +661,17 @@ const bfd_target * const bfd_target_vector[] = {
#ifdef BFD64
&bfd_elf64_littlemips_vec,
#endif
/* start-sanitize-m32r */
&bfd_elf32_m32r_vec,
/* end-sanitize-m32r */
&bfd_elf32_mn10x00_vec,
&bfd_elf32_m68k_vec,
&bfd_elf32_m88k_vec,
&bfd_elf32_sparc_vec,
&bfd_elf32_powerpc_vec,
/* start-sanitize-v850 */
&bfd_elf32_v850_vec,
/* end-sanitize-v850 */
#ifdef BFD64 /* No one seems to use this. */
&bfd_elf64_big_generic_vec,
&bfd_elf64_little_generic_vec,
@ -765,6 +782,7 @@ const bfd_target * const bfd_target_vector[] = {
&ppcboot_vec,
&shcoff_vec,
&shlcoff_vec,
&sparcle_aout_vec,
&sparclynx_aout_vec,
&sparclynx_coff_vec,
&sparcnetbsd_vec,