mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-22 19:09:31 +08:00
* gas/tic80/{add.lst, bitnum.lst, ccode.lst, cregops.lst,
endmask.lst, regops.lst}: Remove ^M's from end of lines. * gas/tic80/bitnum.s: Add comment to each line showing value that symbolic BITNUM assembles to. Add coverage for raw numeric values for the BITNUM operand. * gas/tic80/bitnum.d: Update due to bitnum.s changes. * gas/tic80/regops.d: Update due to opcode library additions of floating point test BITNUM values that are ambiguous with the integral ones. * gas/tic80/relocs1.s: New test case that tests simple relocs. * gas/tic80/relocs1.d: Expected output for above. * gas/tic80/relocs1.lst: TI assembler listing for above. * gas/tic80/tic80.exp: Add relocs1 test.
This commit is contained in:
@ -1,3 +1,21 @@
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start-sanitize-tic80
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Sat Feb 22 20:24:23 1997 Fred Fish <fnf@cygnus.com>
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* gas/tic80/{add.lst, bitnum.lst, ccode.lst, cregops.lst,
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endmask.lst, regops.lst}: Remove ^M's from end of lines.
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* gas/tic80/bitnum.s: Add comment to each line showing value
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that symbolic BITNUM assembles to. Add coverage for raw
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numeric values for the BITNUM operand.
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* gas/tic80/bitnum.d: Update due to bitnum.s changes.
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* gas/tic80/regops.d: Update due to opcode library additions
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of floating point test BITNUM values that are ambiguous with
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the integral ones.
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* gas/tic80/relocs1.s: New test case that tests simple relocs.
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* gas/tic80/relocs1.d: Expected output for above.
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* gas/tic80/relocs1.lst: TI assembler listing for above.
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* gas/tic80/tic80.exp: Add relocs1 test.
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end-sanitize-tic80
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start-sanitize-d30v
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Fri Feb 21 14:23:14 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
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|
@ -26,13 +26,57 @@ Disassembly of section .text:
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44: 0a 40 39 72 bbo r10,r8,ls\.h
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48: 0a 40 39 6a bbo r10,r8,lo\.h
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4c: 0a 40 39 62 bbo r10,r8,hs\.h
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50: 0a 40 39 5a bbo r10,r8,eq\.w
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54: 0a 40 39 52 bbo r10,r8,ne\.w
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58: 0a 40 39 4a bbo r10,r8,gt\.w
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5c: 0a 40 39 42 bbo r10,r8,le\.w
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60: 0a 40 39 3a bbo r10,r8,lt\.w
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64: 0a 40 39 32 bbo r10,r8,ge\.w
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||||
50: 0a 40 39 5a bbo r10,r8,eq\.f
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54: 0a 40 39 52 bbo r10,r8,ne\.f
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58: 0a 40 39 4a bbo r10,r8,gt\.f
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5c: 0a 40 39 42 bbo r10,r8,le\.f
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60: 0a 40 39 3a bbo r10,r8,lt\.f
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64: 0a 40 39 32 bbo r10,r8,ge\.f
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68: 0a 40 39 2a bbo r10,r8,hi\.w
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6c: 0a 40 39 22 bbo r10,r8,ls\.w
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70: 0a 40 39 1a bbo r10,r8,lo\.w
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6c: 0a 40 39 22 bbo r10,r8,in\.f
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70: 0a 40 39 1a bbo r10,r8,ib\.f
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74: 0a 40 39 12 bbo r10,r8,hs\.w
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78: 0a 40 39 5a bbo r10,r8,eq\.f
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7c: 0a 40 39 52 bbo r10,r8,ne\.f
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80: 0a 40 39 4a bbo r10,r8,gt\.f
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84: 0a 40 39 42 bbo r10,r8,le\.f
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88: 0a 40 39 3a bbo r10,r8,lt\.f
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8c: 0a 40 39 32 bbo r10,r8,ge\.f
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90: 0a 40 39 2a bbo r10,r8,hi\.w
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94: 0a 40 39 22 bbo r10,r8,in\.f
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98: 0a 40 39 1a bbo r10,r8,ib\.f
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9c: 0a 40 39 12 bbo r10,r8,hs\.w
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a0: 0a 40 39 0a bbo r10,r8,uo\.f
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a4: 0a 40 39 02 bbo r10,r8,or\.f
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a8: 0a 40 39 fa bbo r10,r8,eq\.b
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ac: 0a 40 39 f2 bbo r10,r8,ne\.b
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b0: 0a 40 39 ea bbo r10,r8,gt\.b
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||||
b4: 0a 40 39 e2 bbo r10,r8,le\.b
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b8: 0a 40 39 da bbo r10,r8,lt\.b
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bc: 0a 40 39 d2 bbo r10,r8,ge\.b
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c0: 0a 40 39 ca bbo r10,r8,hi\.b
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c4: 0a 40 39 c2 bbo r10,r8,ls\.b
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c8: 0a 40 39 ba bbo r10,r8,lo\.b
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cc: 0a 40 39 b2 bbo r10,r8,hs\.b
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d0: 0a 40 39 aa bbo r10,r8,eq\.h
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d4: 0a 40 39 a2 bbo r10,r8,ne\.h
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d8: 0a 40 39 9a bbo r10,r8,gt\.h
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dc: 0a 40 39 92 bbo r10,r8,le\.h
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e0: 0a 40 39 8a bbo r10,r8,lt\.h
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||||
e4: 0a 40 39 82 bbo r10,r8,ge\.h
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||||
e8: 0a 40 39 7a bbo r10,r8,hi\.h
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ec: 0a 40 39 72 bbo r10,r8,ls\.h
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f0: 0a 40 39 6a bbo r10,r8,lo\.h
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||||
f4: 0a 40 39 62 bbo r10,r8,hs\.h
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||||
f8: 0a 40 39 5a bbo r10,r8,eq\.f
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||||
fc: 0a 40 39 52 bbo r10,r8,ne\.f
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||||
100: 0a 40 39 4a bbo r10,r8,gt\.f
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||||
104: 0a 40 39 42 bbo r10,r8,le\.f
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||||
108: 0a 40 39 3a bbo r10,r8,lt\.f
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||||
10c: 0a 40 39 32 bbo r10,r8,ge\.f
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||||
110: 0a 40 39 2a bbo r10,r8,hi\.w
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||||
114: 0a 40 39 22 bbo r10,r8,in\.f
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||||
118: 0a 40 39 1a bbo r10,r8,ib\.f
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||||
11c: 0a 40 39 12 bbo r10,r8,hs\.w
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||||
120: 0a 40 39 0a bbo r10,r8,uo\.f
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||||
124: 0a 40 39 02 bbo r10,r8,or\.f
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||||
|
@ -1,44 +1,97 @@
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MVP MP Macro Assembler Version 1.13 Mon Feb 10 17:00:33 1997
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MVP MP Macro Assembler Version 1.13 Sat Feb 22 21:37:15 1997
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Copyright (c) 1993-1995 Texas Instruments Incorporated
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bitnum.s PAGE 1
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1 ;; Test that all the predefined symbol names for the BITNUM field
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2 ;; are properly accepted and translated to numeric values. Also
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3 ;; verifies that they are disassembled correctly as symbolics.
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4
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5 00000000 FA39400A bbo r10,r8,eq.b
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6 00000004 F239400A bbo r10,r8,ne.b
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7 00000008 EA39400A bbo r10,r8,gt.b
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8 0000000C E239400A bbo r10,r8,le.b
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9 00000010 DA39400A bbo r10,r8,lt.b
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10 00000014 D239400A bbo r10,r8,ge.b
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11 00000018 CA39400A bbo r10,r8,hi.b
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||||
12 0000001C C239400A bbo r10,r8,ls.b
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13 00000020 BA39400A bbo r10,r8,lo.b
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14 00000024 B239400A bbo r10,r8,hs.b
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||||
15
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16 00000028 AA39400A bbo r10,r8,eq.h
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17 0000002C A239400A bbo r10,r8,ne.h
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||||
18 00000030 9A39400A bbo r10,r8,gt.h
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||||
19 00000034 9239400A bbo r10,r8,le.h
|
||||
20 00000038 8A39400A bbo r10,r8,lt.h
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||||
21 0000003C 8239400A bbo r10,r8,ge.h
|
||||
22 00000040 7A39400A bbo r10,r8,hi.h
|
||||
23 00000044 7239400A bbo r10,r8,ls.h
|
||||
24 00000048 6A39400A bbo r10,r8,lo.h
|
||||
25 0000004C 6239400A bbo r10,r8,hs.h
|
||||
26
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||||
27 00000050 5A39400A bbo r10,r8,eq.w
|
||||
28 00000054 5239400A bbo r10,r8,ne.w
|
||||
29 00000058 4A39400A bbo r10,r8,gt.w
|
||||
30 0000005C 4239400A bbo r10,r8,le.w
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||||
31 00000060 3A39400A bbo r10,r8,lt.w
|
||||
32 00000064 3239400A bbo r10,r8,ge.w
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||||
33 00000068 2A39400A bbo r10,r8,hi.w
|
||||
34 0000006C 2239400A bbo r10,r8,ls.w
|
||||
35 00000070 1A39400A bbo r10,r8,lo.w
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||||
36 00000074 1239400A bbo r10,r8,hs.w
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||||
37
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||||
3 ;; verifies that they are disassembled correctly as symbolics, and
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4 ;; that the raw numeric values are handled correctly (stored as
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5 ;; the one's complement of the operand numeric value.
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||||
6
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7 00000000 FA39400A bbo r10,r8,eq.b ; (~0 & 0x1F)
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8 00000004 F239400A bbo r10,r8,ne.b ; (~1 & 0x1F)
|
||||
9 00000008 EA39400A bbo r10,r8,gt.b ; (~2 & 0x1F)
|
||||
10 0000000C E239400A bbo r10,r8,le.b ; (~3 & 0x1F)
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||||
11 00000010 DA39400A bbo r10,r8,lt.b ; (~4 & 0x1F)
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||||
12 00000014 D239400A bbo r10,r8,ge.b ; (~5 & 0x1F)
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||||
13 00000018 CA39400A bbo r10,r8,hi.b ; (~6 & 0x1F)
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||||
14 0000001C C239400A bbo r10,r8,ls.b ; (~7 & 0x1F)
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||||
15 00000020 BA39400A bbo r10,r8,lo.b ; (~8 & 0x1F)
|
||||
16 00000024 B239400A bbo r10,r8,hs.b ; (~9 & 0x1F)
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||||
17
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||||
18 00000028 AA39400A bbo r10,r8,eq.h ; (~10 & 0x1F)
|
||||
19 0000002C A239400A bbo r10,r8,ne.h ; (~11 & 0x1F)
|
||||
20 00000030 9A39400A bbo r10,r8,gt.h ; (~12 & 0x1F)
|
||||
21 00000034 9239400A bbo r10,r8,le.h ; (~13 & 0x1F)
|
||||
22 00000038 8A39400A bbo r10,r8,lt.h ; (~14 & 0x1F)
|
||||
23 0000003C 8239400A bbo r10,r8,ge.h ; (~15 & 0x1F)
|
||||
24 00000040 7A39400A bbo r10,r8,hi.h ; (~16 & 0x1F)
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||||
25 00000044 7239400A bbo r10,r8,ls.h ; (~17 & 0x1F)
|
||||
26 00000048 6A39400A bbo r10,r8,lo.h ; (~18 & 0x1F)
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||||
27 0000004C 6239400A bbo r10,r8,hs.h ; (~19 & 0x1F)
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||||
28
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||||
29 00000050 5A39400A bbo r10,r8,eq.w ; (~20 & 0x1F)
|
||||
30 00000054 5239400A bbo r10,r8,ne.w ; (~21 & 0x1F)
|
||||
31 00000058 4A39400A bbo r10,r8,gt.w ; (~22 & 0x1F)
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||||
32 0000005C 4239400A bbo r10,r8,le.w ; (~23 & 0x1F)
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||||
33 00000060 3A39400A bbo r10,r8,lt.w ; (~24 & 0x1F)
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||||
34 00000064 3239400A bbo r10,r8,ge.w ; (~25 & 0x1F)
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||||
35 00000068 2A39400A bbo r10,r8,hi.w ; (~26 & 0x1F)
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||||
36 0000006C 2239400A bbo r10,r8,ls.w ; (~27 & 0x1F)
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||||
37 00000070 1A39400A bbo r10,r8,lo.w ; (~28 & 0x1F)
|
||||
38 00000074 1239400A bbo r10,r8,hs.w ; (~29 & 0x1F)
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||||
39
|
||||
40 00000078 5A39400A bbo r10,r8,eq.f ; (~20 & 0x1F)
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||||
41 0000007C 5239400A bbo r10,r8,ne.f ; (~21 & 0x1F)
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||||
42 00000080 4A39400A bbo r10,r8,gt.f ; (~22 & 0x1F)
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||||
43 00000084 4239400A bbo r10,r8,le.f ; (~23 & 0x1F)
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||||
44 00000088 3A39400A bbo r10,r8,lt.f ; (~24 & 0x1F)
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||||
45 0000008C 3239400A bbo r10,r8,ge.f ; (~25 & 0x1F)
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||||
46 00000090 2A39400A bbo r10,r8,ou.f ; (~26 & 0x1F)
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||||
47 00000094 2239400A bbo r10,r8,in.f ; (~27 & 0x1F)
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||||
48 00000098 1A39400A bbo r10,r8,ib.f ; (~28 & 0x1F)
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||||
49 0000009C 1239400A bbo r10,r8,ob.f ; (~29 & 0x1F)
|
||||
50 000000A0 0A39400A bbo r10,r8,uo.f ; (~30 & 0x1F)
|
||||
51 000000A4 0239400A bbo r10,r8,or.f ; (~31 & 0x1F)
|
||||
52
|
||||
53 000000A8 FA39400A bbo r10,r8,0
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||||
54 000000AC F239400A bbo r10,r8,1
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||||
55 000000B0 EA39400A bbo r10,r8,2
|
||||
MVP MP Macro Assembler Version 1.13 Sat Feb 22 21:37:15 1997
|
||||
Copyright (c) 1993-1995 Texas Instruments Incorporated
|
||||
|
||||
bitnum.s PAGE 2
|
||||
|
||||
56 000000B4 E239400A bbo r10,r8,3
|
||||
57 000000B8 DA39400A bbo r10,r8,4
|
||||
58 000000BC D239400A bbo r10,r8,5
|
||||
59 000000C0 CA39400A bbo r10,r8,6
|
||||
60 000000C4 C239400A bbo r10,r8,7
|
||||
61 000000C8 BA39400A bbo r10,r8,8
|
||||
62 000000CC B239400A bbo r10,r8,9
|
||||
63 000000D0 AA39400A bbo r10,r8,10
|
||||
64 000000D4 A239400A bbo r10,r8,11
|
||||
65 000000D8 9A39400A bbo r10,r8,12
|
||||
66 000000DC 9239400A bbo r10,r8,13
|
||||
67 000000E0 8A39400A bbo r10,r8,14
|
||||
68 000000E4 8239400A bbo r10,r8,15
|
||||
69 000000E8 7A39400A bbo r10,r8,16
|
||||
70 000000EC 7239400A bbo r10,r8,17
|
||||
71 000000F0 6A39400A bbo r10,r8,18
|
||||
72 000000F4 6239400A bbo r10,r8,19
|
||||
73 000000F8 5A39400A bbo r10,r8,20
|
||||
74 000000FC 5239400A bbo r10,r8,21
|
||||
75 00000100 4A39400A bbo r10,r8,22
|
||||
76 00000104 4239400A bbo r10,r8,23
|
||||
77 00000108 3A39400A bbo r10,r8,24
|
||||
78 0000010C 3239400A bbo r10,r8,25
|
||||
79 00000110 2A39400A bbo r10,r8,26
|
||||
80 00000114 2239400A bbo r10,r8,27
|
||||
81 00000118 1A39400A bbo r10,r8,28
|
||||
82 0000011C 1239400A bbo r10,r8,29
|
||||
83 00000120 0A39400A bbo r10,r8,30
|
||||
84 00000124 0239400A bbo r10,r8,31
|
||||
85
|
||||
|
||||
No Errors, No Warnings
|
||||
|
@ -1,37 +1,85 @@
|
||||
;; Test that all the predefined symbol names for the BITNUM field
|
||||
;; are properly accepted and translated to numeric values. Also
|
||||
;; verifies that they are disassembled correctly as symbolics.
|
||||
;; verifies that they are disassembled correctly as symbolics, and
|
||||
;; that the raw numeric values are handled correctly (stored as
|
||||
;; the one's complement of the operand numeric value.
|
||||
|
||||
bbo r10,r8,eq.b
|
||||
bbo r10,r8,ne.b
|
||||
bbo r10,r8,gt.b
|
||||
bbo r10,r8,le.b
|
||||
bbo r10,r8,lt.b
|
||||
bbo r10,r8,ge.b
|
||||
bbo r10,r8,hi.b
|
||||
bbo r10,r8,ls.b
|
||||
bbo r10,r8,lo.b
|
||||
bbo r10,r8,hs.b
|
||||
bbo r10,r8,eq.b ; (~0 & 0x1F)
|
||||
bbo r10,r8,ne.b ; (~1 & 0x1F)
|
||||
bbo r10,r8,gt.b ; (~2 & 0x1F)
|
||||
bbo r10,r8,le.b ; (~3 & 0x1F)
|
||||
bbo r10,r8,lt.b ; (~4 & 0x1F)
|
||||
bbo r10,r8,ge.b ; (~5 & 0x1F)
|
||||
bbo r10,r8,hi.b ; (~6 & 0x1F)
|
||||
bbo r10,r8,ls.b ; (~7 & 0x1F)
|
||||
bbo r10,r8,lo.b ; (~8 & 0x1F)
|
||||
bbo r10,r8,hs.b ; (~9 & 0x1F)
|
||||
|
||||
bbo r10,r8,eq.h
|
||||
bbo r10,r8,ne.h
|
||||
bbo r10,r8,gt.h
|
||||
bbo r10,r8,le.h
|
||||
bbo r10,r8,lt.h
|
||||
bbo r10,r8,ge.h
|
||||
bbo r10,r8,hi.h
|
||||
bbo r10,r8,ls.h
|
||||
bbo r10,r8,lo.h
|
||||
bbo r10,r8,hs.h
|
||||
bbo r10,r8,eq.h ; (~10 & 0x1F)
|
||||
bbo r10,r8,ne.h ; (~11 & 0x1F)
|
||||
bbo r10,r8,gt.h ; (~12 & 0x1F)
|
||||
bbo r10,r8,le.h ; (~13 & 0x1F)
|
||||
bbo r10,r8,lt.h ; (~14 & 0x1F)
|
||||
bbo r10,r8,ge.h ; (~15 & 0x1F)
|
||||
bbo r10,r8,hi.h ; (~16 & 0x1F)
|
||||
bbo r10,r8,ls.h ; (~17 & 0x1F)
|
||||
bbo r10,r8,lo.h ; (~18 & 0x1F)
|
||||
bbo r10,r8,hs.h ; (~19 & 0x1F)
|
||||
|
||||
bbo r10,r8,eq.w
|
||||
bbo r10,r8,ne.w
|
||||
bbo r10,r8,gt.w
|
||||
bbo r10,r8,le.w
|
||||
bbo r10,r8,lt.w
|
||||
bbo r10,r8,ge.w
|
||||
bbo r10,r8,hi.w
|
||||
bbo r10,r8,ls.w
|
||||
bbo r10,r8,lo.w
|
||||
bbo r10,r8,hs.w
|
||||
bbo r10,r8,eq.w ; (~20 & 0x1F)
|
||||
bbo r10,r8,ne.w ; (~21 & 0x1F)
|
||||
bbo r10,r8,gt.w ; (~22 & 0x1F)
|
||||
bbo r10,r8,le.w ; (~23 & 0x1F)
|
||||
bbo r10,r8,lt.w ; (~24 & 0x1F)
|
||||
bbo r10,r8,ge.w ; (~25 & 0x1F)
|
||||
bbo r10,r8,hi.w ; (~26 & 0x1F)
|
||||
bbo r10,r8,ls.w ; (~27 & 0x1F)
|
||||
bbo r10,r8,lo.w ; (~28 & 0x1F)
|
||||
bbo r10,r8,hs.w ; (~29 & 0x1F)
|
||||
|
||||
bbo r10,r8,eq.f ; (~20 & 0x1F)
|
||||
bbo r10,r8,ne.f ; (~21 & 0x1F)
|
||||
bbo r10,r8,gt.f ; (~22 & 0x1F)
|
||||
bbo r10,r8,le.f ; (~23 & 0x1F)
|
||||
bbo r10,r8,lt.f ; (~24 & 0x1F)
|
||||
bbo r10,r8,ge.f ; (~25 & 0x1F)
|
||||
bbo r10,r8,ou.f ; (~26 & 0x1F)
|
||||
bbo r10,r8,in.f ; (~27 & 0x1F)
|
||||
bbo r10,r8,ib.f ; (~28 & 0x1F)
|
||||
bbo r10,r8,ob.f ; (~29 & 0x1F)
|
||||
bbo r10,r8,uo.f ; (~30 & 0x1F)
|
||||
bbo r10,r8,or.f ; (~31 & 0x1F)
|
||||
|
||||
bbo r10,r8,0
|
||||
bbo r10,r8,1
|
||||
bbo r10,r8,2
|
||||
bbo r10,r8,3
|
||||
bbo r10,r8,4
|
||||
bbo r10,r8,5
|
||||
bbo r10,r8,6
|
||||
bbo r10,r8,7
|
||||
bbo r10,r8,8
|
||||
bbo r10,r8,9
|
||||
bbo r10,r8,10
|
||||
bbo r10,r8,11
|
||||
bbo r10,r8,12
|
||||
bbo r10,r8,13
|
||||
bbo r10,r8,14
|
||||
bbo r10,r8,15
|
||||
bbo r10,r8,16
|
||||
bbo r10,r8,17
|
||||
bbo r10,r8,18
|
||||
bbo r10,r8,19
|
||||
bbo r10,r8,20
|
||||
bbo r10,r8,21
|
||||
bbo r10,r8,22
|
||||
bbo r10,r8,23
|
||||
bbo r10,r8,24
|
||||
bbo r10,r8,25
|
||||
bbo r10,r8,26
|
||||
bbo r10,r8,27
|
||||
bbo r10,r8,28
|
||||
bbo r10,r8,29
|
||||
bbo r10,r8,30
|
||||
bbo r10,r8,31
|
||||
|
||||
|
@ -13,9 +13,9 @@ Disassembly of section .text:
|
||||
10: 0a 00 33 73 and\.ff r10,r12,r14
|
||||
14: 0a 80 32 73 and\.ft r10,r12,r14
|
||||
18: 0a 40 32 73 and\.tf r10,r12,r14
|
||||
1c: 0a 40 39 1a bbo r10,r8,lo\.w
|
||||
1c: 0a 40 39 1a bbo r10,r8,ib\.f
|
||||
20: 0a 60 39 fa bbo\.a r10,r8,eq\.b
|
||||
24: 0a 00 39 22 bbz r10,r8,ls\.w
|
||||
24: 0a 00 39 22 bbz r10,r8,in\.f
|
||||
28: 0a 20 39 2a bbz\.a r10,r8,hi\.w
|
||||
2c: 04 80 b9 21 bcnd r4,r6,lt0\.b
|
||||
30: 04 a0 b9 21 bcnd\.a r4,r6,lt0\.b
|
||||
|
64
gas/testsuite/gas/tic80/relocs1.d
Normal file
64
gas/testsuite/gas/tic80/relocs1.d
Normal file
@ -0,0 +1,64 @@
|
||||
#objdump: -dr
|
||||
#name: TIc80 simple relocs, global/local funcs & branches
|
||||
|
||||
.*: +file format .*tic80.*
|
||||
|
||||
Disassembly of section .text:
|
||||
|
||||
00000000 <_sfunc>:
|
||||
0: f0 ff 6c 08 addu -16,r1,r1
|
||||
4: 0c 00 59 f8 st 12\(r1\),r31
|
||||
8: 00 00 59 10 st 0\(r1\),r2
|
||||
c: 00 90 38 f8 jsr 0 <_sfunc>\(r0\),r31
|
||||
10: 00 00 00 00
|
||||
10: 32 _xfunc
|
||||
14: 00 00 51 10 ld 0\(r1\),r2
|
||||
18: 0c 00 51 f8 ld 12\(r1\),r31
|
||||
1c: 1f 80 38 00 jsr r31\(r0\),r0
|
||||
20: 10 80 6c 08 addu 16,r1,r1
|
||||
|
||||
00000024 <_gfunc>:
|
||||
24: f0 ff 6c 08 addu -16,r1,r1
|
||||
28: 0c 00 59 f8 st 12\(r1\),r31
|
||||
2c: 00 00 59 10 st 0\(r1\),r2
|
||||
30: 00 90 38 f8 jsr 0 <_sfunc>\(r0\),r31
|
||||
34: 00 00 00 00
|
||||
34: 32 *ABS*
|
||||
38: 00 00 51 10 ld 0\(r1\),r2
|
||||
3c: 0c 00 51 f8 ld 12\(r1\),r31
|
||||
40: 1f 80 38 00 jsr r31\(r0\),r0
|
||||
44: 10 80 6c 08 addu 16,r1,r1
|
||||
|
||||
00000048 <_branches>:
|
||||
48: f0 ff 6c 08 addu -16,r1,r1
|
||||
4c: 0c 00 59 f8 st 12\(r1\),r31
|
||||
50: 00 00 59 10 st 0\(r1\),r2
|
||||
54: 00 00 51 10 ld 0\(r1\),r2
|
||||
58: 04 00 59 10 st 4\(r1\),r2
|
||||
5c: 00 00 51 10 ld 0\(r1\),r2
|
||||
60: 04 00 51 18 ld 4\(r1\),r3
|
||||
64: 0a 80 ac 10 addu 10,r2,r2
|
||||
68: 03 00 ba 10 cmp r3,r2,r2
|
||||
6c: 12 80 a5 30 bbo\.a b4 <_branches+6c>,r2,ge\.f
|
||||
70: 04 00 51 10 ld 4\(r1\),r2
|
||||
74: 05 80 a4 f8 bbz\.a 88 <_branches+40>,r2,eq\.b
|
||||
78: 00 90 38 f8 jsr 24 <_gfunc>\(r0\),r31
|
||||
7c: 24 00 00 00
|
||||
7c: 32 *ABS*
|
||||
80: 04 00 51 10 ld 4\(r1\),r2
|
||||
84: 04 80 24 00 br\.a 94 <_branches+4c>
|
||||
88: 00 90 38 f8 jsr 0 <_sfunc>\(r0\),r31
|
||||
8c: 00 00 00 00
|
||||
8c: 32 _xfunc
|
||||
90: 04 00 51 10 ld 4\(r1\),r2
|
||||
94: 04 00 51 10 ld 4\(r1\),r2
|
||||
98: 01 80 ac 10 addu 1,r2,r2
|
||||
9c: 04 00 59 10 st 4\(r1\),r2
|
||||
a0: 00 00 51 18 ld 0\(r1\),r3
|
||||
a4: 04 00 51 10 ld 4\(r1\),r2
|
||||
a8: 0a 80 ec 18 addu 10,r3,r3
|
||||
ac: 02 00 fa 10 cmp r2,r3,r2
|
||||
b0: f0 ff a5 38 bbo\.a 70 <_branches+28>,r2,lt\.f
|
||||
b4: 0c 00 51 f8 ld 12\(r1\),r31
|
||||
b8: 1f 80 38 00 jsr r31\(r0\),r0
|
||||
bc: 10 80 6c 08 addu 16,r1,r1
|
80
gas/testsuite/gas/tic80/relocs1.lst
Normal file
80
gas/testsuite/gas/tic80/relocs1.lst
Normal file
@ -0,0 +1,80 @@
|
||||
MVP MP Macro Assembler Version 1.13 Sat Feb 22 13:19:28 1997
|
||||
Copyright (c) 1993-1995 Texas Instruments Incorporated
|
||||
|
||||
relocs1.s PAGE 1
|
||||
|
||||
1 ;; This is the hand hacked output of the TI C compiler for a simple
|
||||
2 ;; test program that contains local/global functions, local/global
|
||||
3 ;; function calls, and an "if" and "for" statement.
|
||||
4
|
||||
5 .global _xfunc
|
||||
6
|
||||
7 00000000 _sfunc:
|
||||
8 00000000 086CFFF0 addu -16,r1,r1
|
||||
9 00000004 F859000C st 12(r1),r31
|
||||
10 00000008 10590000 st 0(r1),r2
|
||||
11 0000000C F8389000 jsr _xfunc(r0),r31
|
||||
00000010 00000000
|
||||
12 00000014 10510000 ld 0(r1),r2
|
||||
13 00000018 F851000C ld 12(r1),r31
|
||||
14 0000001C 0038801F jsr r31(r0),r0
|
||||
15 00000020 086C8010 addu 16,r1,r1
|
||||
16
|
||||
17 .global _gfunc
|
||||
18
|
||||
19 00000024 _gfunc:
|
||||
20 00000024 086CFFF0 addu -16,r1,r1
|
||||
21 00000028 F859000C st 12(r1),r31
|
||||
22 0000002C 10590000 st 0(r1),r2
|
||||
23 00000030 F8389000 jsr _sfunc(r0),r31
|
||||
00000034 00000000
|
||||
24 00000038 10510000 ld 0(r1),r2
|
||||
25 0000003C F851000C ld 12(r1),r31
|
||||
26 00000040 0038801F jsr r31(r0),r0
|
||||
27 00000044 086C8010 addu 16,r1,r1
|
||||
28
|
||||
29
|
||||
30 .global _branches
|
||||
31
|
||||
32 00000048 _branches:
|
||||
33 00000048 086CFFF0 addu -16,r1,r1
|
||||
34 0000004C F859000C st 12(r1),r31
|
||||
35 00000050 10590000 st 0(r1),r2
|
||||
36 00000054 10510000 ld 0(r1),r2
|
||||
37 00000058 10590004 st 4(r1),r2
|
||||
38 0000005C 10510000 ld 0(r1),r2
|
||||
39 00000060 18510004 ld 4(r1),r3
|
||||
40 00000064 10AC800A addu 10,r2,r2
|
||||
41 00000068 10BA0003 cmp r3,r2,r2
|
||||
42 0000006C 30A58012 bbo.a L12,r2,ge.w
|
||||
43 00000070 L8:
|
||||
44 00000070 10510004 ld 4(r1),r2
|
||||
45 00000074 F8A48005 bbz.a L10,r2,0
|
||||
46 00000078 F8389000 jsr _gfunc(r0),r31
|
||||
0000007C 00000024
|
||||
47 00000080 10510004 ld 4(r1),r2
|
||||
48 00000084 00248004 br.a L11
|
||||
49 00000088 L10:
|
||||
50 00000088 F8389000 jsr _xfunc(r0),r31
|
||||
0000008C 00000000
|
||||
51 00000090 10510004 ld 4(r1),r2
|
||||
MVP MP Macro Assembler Version 1.13 Sat Feb 22 13:19:28 1997
|
||||
Copyright (c) 1993-1995 Texas Instruments Incorporated
|
||||
|
||||
relocs1.s PAGE 2
|
||||
|
||||
52 00000094 L11:
|
||||
53 00000094 10510004 ld 4(r1),r2
|
||||
54 00000098 10AC8001 addu 1,r2,r2
|
||||
55 0000009C 10590004 st 4(r1),r2
|
||||
56 000000A0 18510000 ld 0(r1),r3
|
||||
57 000000A4 10510004 ld 4(r1),r2
|
||||
58 000000A8 18EC800A addu 10,r3,r3
|
||||
59 000000AC 10FA0002 cmp r2,r3,r2
|
||||
60 000000B0 38A5FFF0 bbo.a L8,r2,lt.w
|
||||
61 000000B4 L12:
|
||||
62 000000B4 F851000C ld 12(r1),r31
|
||||
63 000000B8 0038801F jsr r31(r0),r0
|
||||
64 000000BC 086C8010 addu 16,r1,r1
|
||||
|
||||
No Errors, No Warnings
|
66
gas/testsuite/gas/tic80/relocs1.s
Normal file
66
gas/testsuite/gas/tic80/relocs1.s
Normal file
@ -0,0 +1,66 @@
|
||||
;; This is the hand hacked output of the TI C compiler for a simple
|
||||
;; test program that contains local/global functions, local/global
|
||||
;; function calls, and an "if" and "for" statement.
|
||||
|
||||
.file "relocs1.s"
|
||||
|
||||
.global _xfunc
|
||||
|
||||
_sfunc:
|
||||
addu -16,r1,r1
|
||||
st 12(r1),r31
|
||||
st 0(r1),r2
|
||||
jsr _xfunc(r0),r31
|
||||
ld 0(r1),r2
|
||||
ld 12(r1),r31
|
||||
jsr r31(r0),r0
|
||||
addu 16,r1,r1
|
||||
|
||||
.global _gfunc
|
||||
|
||||
_gfunc:
|
||||
addu -16,r1,r1
|
||||
st 12(r1),r31
|
||||
st 0(r1),r2
|
||||
jsr _sfunc(r0),r31
|
||||
ld 0(r1),r2
|
||||
ld 12(r1),r31
|
||||
jsr r31(r0),r0
|
||||
addu 16,r1,r1
|
||||
|
||||
|
||||
.global _branches
|
||||
|
||||
_branches:
|
||||
addu -16,r1,r1
|
||||
st 12(r1),r31
|
||||
st 0(r1),r2
|
||||
ld 0(r1),r2
|
||||
st 4(r1),r2
|
||||
ld 0(r1),r2
|
||||
ld 4(r1),r3
|
||||
addu 10,r2,r2
|
||||
cmp r3,r2,r2
|
||||
bbo.a L12,r2,ge.w
|
||||
L8:
|
||||
ld 4(r1),r2
|
||||
bbz.a L10,r2,0
|
||||
jsr _gfunc(r0),r31
|
||||
ld 4(r1),r2
|
||||
br.a L11
|
||||
L10:
|
||||
jsr _xfunc(r0),r31
|
||||
ld 4(r1),r2
|
||||
L11:
|
||||
ld 4(r1),r2
|
||||
addu 1,r2,r2
|
||||
st 4(r1),r2
|
||||
ld 0(r1),r3
|
||||
ld 4(r1),r2
|
||||
addu 10,r3,r3
|
||||
cmp r2,r3,r2
|
||||
bbo.a L8,r2,lt.w
|
||||
L12:
|
||||
ld 12(r1),r31
|
||||
jsr r31(r0),r0
|
||||
addu 16,r1,r1
|
@ -9,4 +9,5 @@ if [istarget tic80*-*-*] then {
|
||||
run_dump_test "bitnum"
|
||||
run_dump_test "ccode"
|
||||
run_dump_test "add"
|
||||
run_dump_test "relocs1"
|
||||
}
|
||||
|
Reference in New Issue
Block a user