gas/

2007-09-12  Jan Beulich  <jbeulich@novell.com>

	* config/tc-i386.c (md_assemble): Move handling of extrq/insertq
	after generic operand swapping, and swap only the immediate operands.

gas/testsuite/
2007-09-12  Jan Beulich  <jbeulich@novell.com>
	* gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax
	code.
	* gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.

gas/ChangeLog

@@ -1,3 +1,8 @@
+2007-09-12  Jan Beulich  <jbeulich@novell.com>
+
+	* config/tc-i386.c (md_assemble): Move handling of extrq/insertq
+	after generic operand swapping, and swap only the immediate operands.
+
 2007-09-11  Nathan Sidwell  <nathan@codesourcery.com>
 
 	* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.

gas/config/tc-i386.c

@@ -2135,20 +2135,6 @@ md_assemble (line)
   if (line == NULL)
     return;
 
-  /* The order of the immediates should be reversed
-     for 2 immediates extrq and insertq instructions */
-  if ((i.imm_operands == 2)
-      && ((strcmp (mnemonic, "extrq") == 0)
-	  || (strcmp (mnemonic, "insertq") == 0)))
-    {
-      swap_2_operands (0, 1);
-      /* "extrq" and insertq" are the only two instructions whose operands
-	 have to be reversed even though they have two immediate operands.
-      */
-      if (intel_syntax)
-	swap_operands ();
-    }
-
   /* Now we've parsed the mnemonic into a set of templates, and have the
      operands at hand.  */
 
@@ -2164,6 +2150,13 @@ md_assemble (line)
 	   && operand_type_check (i.types[1], imm)))
     swap_operands ();
 
+  /* The order of the immediates should be reversed
+     for 2 immediates extrq and insertq instructions */
+  if (i.imm_operands == 2
+      && (strcmp (mnemonic, "extrq") == 0
+	  || strcmp (mnemonic, "insertq") == 0))
+      swap_2_operands (0, 1);
+
   if (i.imm_operands)
     optimize_imm ();
 

gas/testsuite/ChangeLog

@@ -1,3 +1,8 @@
+2007-09-12  Jan Beulich  <jbeulich@novell.com>
+	* gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax
+	code.
+	* gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
+
 2007-09-06  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gas/i386/svme.s: Updated to allow eax in 64bit.

gas/testsuite/gas/i386/amdfam10.d

@@ -20,4 +20,18 @@ Disassembly of section .text:
   32:	f2 0f 78 ca 02 04[ 	]*insertq \$0x4,\$0x2,%xmm2,%xmm1
   38:	f2 0f 2b 09[ 	]+movntsd %xmm1,\(%ecx\)
   3c:	f3 0f 2b 09[ 	]+movntss %xmm1,\(%ecx\)
-
+[ 	]*[a-f0-9]+:	f3 0f bd 19[ 	]+lzcnt  \(%ecx\),%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f bd 19[ 	 ]+lzcnt  \(%ecx\),%bx
+[ 	]*[a-f0-9]+:	f3 0f bd d9[ 	 ]+lzcnt  %ecx,%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f bd d9[ 	 ]+lzcnt  %cx,%bx
+[ 	]*[a-f0-9]+:	f3 0f b8 19[ 	]+popcnt \(%ecx\),%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f b8 19[ 	]+popcnt \(%ecx\),%bx
+[ 	]*[a-f0-9]+:	f3 0f b8 d9[ 	]+popcnt %ecx,%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f b8 d9[ 	]+popcnt %cx,%bx
+[ 	]*[a-f0-9]+:	66 0f 79 ca[ 	]+extrq  %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	66 0f 78 c1 02 04[ 	]*extrq  \$0x4,\$0x2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 79 ca[ 	]+insertq %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 78 ca 02 04[ 	]*insertq \$0x4,\$0x2,%xmm2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 2b 09[ 	]+movntsd %xmm1,\(%ecx\)
+[ 	]*[a-f0-9]+:	f3 0f 2b 09[ 	]+movntss %xmm1,\(%ecx\)
+#pass

gas/testsuite/gas/i386/amdfam10.s

@@ -17,5 +17,21 @@ foo:
 	movntsd	%xmm1,(%ecx)
 	movntss %xmm1,(%ecx)
 
+	.intel_syntax noprefix
+	lzcnt	ebx,[ecx]
+	lzcnt	bx,[ecx]
+	lzcnt	ebx,ecx
+	lzcnt	bx,cx
+	popcnt	ebx,[ecx]
+	popcnt	bx,[ecx]
+	popcnt	ebx,ecx
+	popcnt	bx,cx
+	extrq	xmm1,xmm2
+	extrq	xmm1,2,4
+	insertq	xmm1,xmm2
+	insertq	xmm1,xmm2,2,4
+	movntsd	[ecx],xmm1
+	movntss [ecx],xmm1
+
 	# Force a good alignment.
 	.p2align	4,0

gas/testsuite/gas/i386/x86-64-amdfam10.d

@@ -24,4 +24,22 @@ Disassembly of section .text:
   46:	f2 0f 78 ca 02 04[ 	]+insertq \$0x4,\$0x2,%xmm2,%xmm1
   4c:	f2 0f 2b 09[ 	]+movntsd %xmm1,\(%rcx\)
   50:	f3 0f 2b 09[ 	]+movntss %xmm1,\(%rcx\)
-	...
+[ 	]*[a-f0-9]+:	f3 48 0f bd 19[ 	]+lzcnt  \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	f3 0f bd 19[ 	]+lzcnt  \(%rcx\),%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f bd 19[ 	 ]+lzcnt  \(%rcx\),%bx
+[ 	]*[a-f0-9]+:	f3 48 0f bd d9[ 	 ]+lzcnt  %rcx,%rbx
+[ 	]*[a-f0-9]+:	f3 0f bd d9[ 	 ]+lzcnt  %ecx,%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f bd d9[ 	 ]+lzcnt  %cx,%bx
+[ 	]*[a-f0-9]+:	f3 48 0f b8 19[ 	]+popcnt \(%rcx\),%rbx
+[ 	]*[a-f0-9]+:	f3 0f b8 19[ 	]+popcnt \(%rcx\),%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f b8 19[ 	]+popcnt \(%rcx\),%bx
+[ 	]*[a-f0-9]+:	f3 48 0f b8 d9[ 	]+popcnt %rcx,%rbx
+[ 	]*[a-f0-9]+:	f3 0f b8 d9[ 	]+popcnt %ecx,%ebx
+[ 	]*[a-f0-9]+:	66 f3 0f b8 d9[ 	]+popcnt %cx,%bx
+[ 	]*[a-f0-9]+:	66 0f 79 ca[ 	]+extrq  %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	66 0f 78 c1 02 04[ 	]*extrq  \$0x4,\$0x2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 79 ca[ 	]+insertq %xmm2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 78 ca 02 04[ 	]*insertq \$0x4,\$0x2,%xmm2,%xmm1
+[ 	]*[a-f0-9]+:	f2 0f 2b 09[ 	]+movntsd %xmm1,\(%rcx\)
+[ 	]*[a-f0-9]+:	f3 0f 2b 09[ 	]+movntss %xmm1,\(%rcx\)
+#pass

gas/testsuite/gas/i386/x86-64-amdfam10.s

@@ -21,5 +21,25 @@ foo:
 	movntsd	%xmm1,(%rcx)
 	movntss %xmm1,(%rcx)
 
+	.intel_syntax noprefix
+	lzcnt	rbx,[rcx]
+	lzcnt	ebx,[rcx]
+	lzcnt	bx,[rcx]
+	lzcnt	rbx,rcx
+	lzcnt	ebx,ecx
+	lzcnt	bx,cx
+	popcnt	rbx,[rcx]
+	popcnt	ebx,[rcx]
+	popcnt	bx,[rcx]
+	popcnt	rbx,rcx
+	popcnt	ebx,ecx
+	popcnt	bx,cx
+	extrq	xmm1,xmm2
+	extrq	xmm1,2,4
+	insertq	xmm1,xmm2
+	insertq	xmm1,xmm2,2,4
+	movntsd	[rcx],xmm1
+	movntss [rcx],xmm1
+
 	# Force a good alignment.
 	.p2align	4,0