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PowerPC: Add new xxmr and xxlnot extended mnemonics

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opcodes/
	* ppc-opc.c (powerpc_opcodes) <xxmr, xxlnot>: New extended mnemonics.

gas/
	* testsuite/gas/ppc/vsx.d <xxmr, xxlnot>: Add tests.
	* testsuite/gas/ppc/vsx.s: Likewise.
This commit is contained in:
Peter Bergner
2021-05-27 16:59:15 -05:00
parent 24b21115f5
commit ebcab74124
5 changed files with 19 additions and 0 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2021-05-27 Peter Bergner <bergner@linux.ibm.com>
* testsuite/gas/ppc/vsx.d <xxmr, xxlnot>: Add tests.
* testsuite/gas/ppc/vsx.s: Likewise.
2021-05-27 Alan Modra <amodra@gmail.com> 2021-05-27 Alan Modra <amodra@gmail.com>
* config/tc-nds32.c (do_pseudo_push_bhwd, do_pseudo_pop_bhwd), * config/tc-nds32.c (do_pseudo_push_bhwd, do_pseudo_pop_bhwd),

4
gas/testsuite/gas/ppc/vsx.d
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@ -170,4 +170,8 @@ Disassembly of section \.text:
.*: (7d 0a a6 99|99 a6 0a 7d) lxvd2x vs40,r10,r20 .*: (7d 0a a6 99|99 a6 0a 7d) lxvd2x vs40,r10,r20
.*: (7d 00 a7 99|99 a7 00 7d) stxvd2x vs40,0,r20 .*: (7d 00 a7 99|99 a7 00 7d) stxvd2x vs40,0,r20
.*: (7d 0a a7 99|99 a7 0a 7d) stxvd2x vs40,r10,r20 .*: (7d 0a a7 99|99 a7 0a 7d) stxvd2x vs40,r10,r20
.*: (f1 12 95 17|17 95 12 f1) xxlnot vs40,vs50
.*: (f1 12 95 17|17 95 12 f1) xxlnot vs40,vs50
.*: (f1 12 94 97|97 94 12 f1) xxmr vs40,vs50
.*: (f1 12 94 97|97 94 12 f1) xxmr vs40,vs50
#pass #pass

4
gas/testsuite/gas/ppc/vsx.s
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@ -162,3 +162,7 @@ start:
lxvd2x 40,10,20 lxvd2x 40,10,20
stxvd2x 40,0,20 stxvd2x 40,0,20
stxvd2x 40,10,20 stxvd2x 40,10,20
xxlnot 40,50
xxlnor 40,50,50
xxmr 40,50
xxlor 40,50,50

4
opcodes/ChangeLog
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@ -1,3 +1,7 @@
2021-05-27 Peter Bergner <bergner@linux.ibm.com>
* ppc-opc.c (powerpc_opcodes) <xxmr, xxlnot>: New extended mnemonics.
2021-05-25 Alan Modra <amodra@gmail.com> 2021-05-25 Alan Modra <amodra@gmail.com>
* cris-desc.c: Regenerate. * cris-desc.c: Regenerate.

2
opcodes/ppc-opc.c
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@ -8516,6 +8516,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xsrsp", XX2(60,281), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}}, {"xsrsp", XX2(60,281), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xsmaxjdp", XX3(60,144), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}}, {"xsmaxjdp", XX3(60,144), XX3_MASK, PPCVSX3, PPCVLE, {XT6, XA6, XB6}},
{"xsnmsubasp", XX3(60,145), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}}, {"xsnmsubasp", XX3(60,145), XX3_MASK, PPCVSX2, PPCVLE, {XT6, XA6, XB6}},
{"xxmr", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
{"xxlor", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}}, {"xxlor", XX3(60,146), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xscvuxdsp", XX2(60,296), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}}, {"xscvuxdsp", XX2(60,296), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xststdcsp", XX2(60,298), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}}, {"xststdcsp", XX2(60,298), XX2BFD_MASK, PPCVSX3, PPCVLE, {BF, XB6, DCMX}},
@ -8525,6 +8526,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"xscvsxdsp", XX2(60,312), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}}, {"xscvsxdsp", XX2(60,312), XX2_MASK, PPCVSX2, PPCVLE, {XT6, XB6}},
{"xsmaxdp", XX3(60,160), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}}, {"xsmaxdp", XX3(60,160), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xsnmaddadp", XX3(60,161), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}}, {"xsnmaddadp", XX3(60,161), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xxlnot", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XAB6}},
{"xxlnor", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}}, {"xxlnor", XX3(60,162), XX3_MASK, PPCVSX, PPCVLE, {XT6, XA6, XB6}},
{"xscvdpuxds", XX2(60,328), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}}, {"xscvdpuxds", XX2(60,328), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},
{"xscvspdp", XX2(60,329), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}}, {"xscvspdp", XX2(60,329), XX2_MASK, PPCVSX, PPCVLE, {XT6, XB6}},