mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-08-06 14:49:38 +08:00
import gdb-1999-10-25 snapshot
This commit is contained in:
@ -29,6 +29,7 @@ void sim_queue_bi_write (SIM_CPU *cpu, BI *target, BI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_BI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.bi_write.target = target;
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element->kinds.bi_write.value = value;
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}
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@ -38,6 +39,7 @@ void sim_queue_qi_write (SIM_CPU *cpu, UQI *target, UQI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_QI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.qi_write.target = target;
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element->kinds.qi_write.value = value;
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}
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@ -47,6 +49,7 @@ void sim_queue_si_write (SIM_CPU *cpu, SI *target, SI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_SI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.si_write.target = target;
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element->kinds.si_write.value = value;
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}
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@ -56,6 +59,7 @@ void sim_queue_sf_write (SIM_CPU *cpu, SI *target, SF value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_SF_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.sf_write.target = target;
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element->kinds.sf_write.value = value;
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}
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@ -65,6 +69,7 @@ void sim_queue_pc_write (SIM_CPU *cpu, USI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_PC_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.pc_write.value = value;
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}
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@ -78,6 +83,7 @@ void sim_queue_fn_hi_write (
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_FN_HI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.fn_hi_write.function = write_function;
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element->kinds.fn_hi_write.regno = regno;
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element->kinds.fn_hi_write.value = value;
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@ -93,6 +99,7 @@ void sim_queue_fn_si_write (
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_FN_SI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.fn_si_write.function = write_function;
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element->kinds.fn_si_write.regno = regno;
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element->kinds.fn_si_write.value = value;
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@ -108,6 +115,7 @@ void sim_queue_fn_di_write (
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_FN_DI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.fn_di_write.function = write_function;
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element->kinds.fn_di_write.regno = regno;
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element->kinds.fn_di_write.value = value;
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@ -123,16 +131,32 @@ void sim_queue_fn_df_write (
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_FN_DF_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.fn_df_write.function = write_function;
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element->kinds.fn_df_write.regno = regno;
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element->kinds.fn_df_write.value = value;
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}
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void sim_queue_fn_pc_write (
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SIM_CPU *cpu,
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void (*write_function)(SIM_CPU *cpu, USI),
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USI value
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)
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{
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_FN_PC_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.fn_pc_write.function = write_function;
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element->kinds.fn_pc_write.value = value;
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}
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void sim_queue_mem_qi_write (SIM_CPU *cpu, SI address, QI value)
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{
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_MEM_QI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.mem_qi_write.address = address;
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element->kinds.mem_qi_write.value = value;
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}
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@ -142,6 +166,7 @@ void sim_queue_mem_hi_write (SIM_CPU *cpu, SI address, HI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_MEM_HI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.mem_hi_write.address = address;
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element->kinds.mem_hi_write.value = value;
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}
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@ -151,6 +176,7 @@ void sim_queue_mem_si_write (SIM_CPU *cpu, SI address, SI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_MEM_SI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.mem_si_write.address = address;
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element->kinds.mem_si_write.value = value;
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}
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@ -160,6 +186,7 @@ void sim_queue_mem_di_write (SIM_CPU *cpu, SI address, DI value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_MEM_DI_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.mem_di_write.address = address;
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element->kinds.mem_di_write.value = value;
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}
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@ -169,6 +196,7 @@ void sim_queue_mem_df_write (SIM_CPU *cpu, SI address, DF value)
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CGEN_WRITE_QUEUE *q = CPU_WRITE_QUEUE (cpu);
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CGEN_WRITE_QUEUE_ELEMENT *element = CGEN_WRITE_QUEUE_NEXT (q);
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element->kind = CGEN_MEM_DF_WRITE;
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element->insn_address = CPU_PC_GET (cpu);
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element->kinds.mem_df_write.address = address;
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element->kinds.mem_df_write.value = value;
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}
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@ -215,28 +243,31 @@ cgen_write_queue_element_execute (SIM_CPU *cpu, CGEN_WRITE_QUEUE_ELEMENT *item)
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item->kinds.fn_df_write.regno,
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item->kinds.fn_df_write.value);
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break;
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case CGEN_FN_PC_WRITE:
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item->kinds.fn_pc_write.function (cpu, item->kinds.fn_pc_write.value);
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break;
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case CGEN_MEM_QI_WRITE:
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pc = CPU_PC_GET (cpu);
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pc = item->insn_address;
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SETMEMQI (cpu, pc, item->kinds.mem_qi_write.address,
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item->kinds.mem_qi_write.value);
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break;
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case CGEN_MEM_HI_WRITE:
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pc = CPU_PC_GET (cpu);
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pc = item->insn_address;
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SETMEMHI (cpu, pc, item->kinds.mem_hi_write.address,
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item->kinds.mem_hi_write.value);
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break;
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case CGEN_MEM_SI_WRITE:
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pc = CPU_PC_GET (cpu);
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pc = item->insn_address;
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SETMEMSI (cpu, pc, item->kinds.mem_si_write.address,
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item->kinds.mem_si_write.value);
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break;
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case CGEN_MEM_DI_WRITE:
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pc = CPU_PC_GET (cpu);
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pc = item->insn_address;
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SETMEMDI (cpu, pc, item->kinds.mem_di_write.address,
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item->kinds.mem_di_write.value);
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break;
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case CGEN_MEM_DF_WRITE:
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pc = CPU_PC_GET (cpu);
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pc = item->insn_address;
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SETMEMDF (cpu, pc, item->kinds.mem_df_write.address,
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item->kinds.mem_df_write.value);
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break;
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