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* v850-opc.c (v850_operands): Add "SR1" and "SR2" for system

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register source and destination operands.
        (v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
More parsing fixes.
This commit is contained in:
Jeff Law
1996-08-23 17:35:11 +00:00
parent 4fc797ff5c
commit e41c99bd11
2 changed files with 12 additions and 2 deletions
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4
opcodes/ChangeLog
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@ -1,6 +1,10 @@
start-sanitize-v850 start-sanitize-v850
Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com) Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com)
* v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
register source and destination operands.
(v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
* v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix * v850-opc.c (v850_opcodes): Fix thinko in "jmp" opcode. Fix
same thinko in "trap" opcode. same thinko in "trap" opcode.

10
opcodes/v850-opc.c
View File

@ -72,6 +72,12 @@ const struct v850_operand v850_operands[] = {
#define D8 (CCCC+1) #define D8 (CCCC+1)
{ 8, 0, 0, 0, 0 }, { 8, 0, 0, 0, 0 },
/* System register operands. */
#define SR1 (D8+1)
{ 5, 0, 0, 0, V850_OPERAND_SRG },
#define SR2 (SR1+1)
{ 5, 11, 0, 0, V850_OPERAND_SRG },
} ; } ;
@ -220,8 +226,8 @@ const struct v850_opcode v850_opcodes[] = {
{ "halt", two(0x07e0,0x0120), two(0xffff,0xffff), {0}, 4 }, { "halt", two(0x07e0,0x0120), two(0xffff,0xffff), {0}, 4 },
{ "reti", two(0x07e0,0x0140), two(0xffff,0xffff), {0}, 4 }, { "reti", two(0x07e0,0x0140), two(0xffff,0xffff), {0}, 4 },
{ "trap", two(0x07e0,0x0100), two(0xffe0,0xffff), {I5U}, 4 }, { "trap", two(0x07e0,0x0100), two(0xffe0,0xffff), {I5U}, 4 },
{ "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), IF1, 4 }, { "ldsr", two(0x07e0,0x0020), two(0x07e0,0xffff), {R1,SR2}, 4 },
{ "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), IF1, 4 }, { "stsr", two(0x07e0,0x0040), two(0x07e0,0xffff), {SR1,R2}, 4 },
{ "nop", one(0x00), one(0xff), {0}, 2 }, { "nop", one(0x00), one(0xff), {0}, 2 },
} ; } ;