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gas/:
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels generated for LOOP_BEGIN and LOOP_END instructions. (bfin_gen_loop): Likewise. gas/testsuite/: * gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN and LOOP_END instruction are local now. * gas/bfin/flow2.d: Likewise.
This commit is contained in:
Bernd Schmidt
@ -20,6 +20,10 @@
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data register in each rule that moves to the data
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register.
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* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
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generated for LOOP_BEGIN and LOOP_END instructions.
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(bfin_gen_loop): Likewise.
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2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/tc-s390.c (md_parse_option): z10 option added.
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@ -866,15 +866,17 @@ bfin_start_line_hook ()
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input_line_pointer = c;
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if (maybe_end)
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{
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label_name = (char *) xmalloc ((c - c1) + strlen ("__END") + 1);
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label_name = (char *) xmalloc ((c - c1) + strlen ("__END") + 5);
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label_name[0] = 0;
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strcat (label_name, "L$L$");
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strncat (label_name, c1, c-c1);
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strcat (label_name, "__END");
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}
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else /* maybe_begin. */
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{
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label_name = (char *) xmalloc ((c - c1) + strlen ("__BEGIN") + 1);
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label_name = (char *) xmalloc ((c - c1) + strlen ("__BEGIN") + 5);
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label_name[0] = 0;
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strcat (label_name, "L$L$");
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strncat (label_name, c1, c-c1);
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strcat (label_name, "__BEGIN");
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}
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@ -884,8 +886,7 @@ bfin_start_line_hook ()
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/* Loop_End follows the last instruction in the loop.
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Adjust label address. */
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if (maybe_end)
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line_label->sy_value.X_add_number -= last_insn_size;
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((struct local_symbol *) line_label)->lsy_value -= last_insn_size;
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}
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/* Special extra functions that help bfin-parse.y perform its job. */
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@ -1878,15 +1879,17 @@ bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg)
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Expr_Node *lbegin, *lend;
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loopsym = expr->value.s_value;
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lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 1);
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lendsym = (char *) xmalloc (strlen (loopsym) + strlen ("__END") + 1);
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lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 5);
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lendsym = (char *) xmalloc (strlen (loopsym) + strlen ("__END") + 5);
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lbeginsym[0] = 0;
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lendsym[0] = 0;
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strcat (lbeginsym, "L$L$");
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strcat (lbeginsym, loopsym);
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strcat (lbeginsym, "__BEGIN");
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strcat (lendsym, "L$L$");
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strcat (lendsym, loopsym);
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strcat (lendsym, "__END");
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@ -16,6 +16,10 @@
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* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
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for IU option.
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* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
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and LOOP_END instruction are local now.
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* gas/bfin/flow2.d: Likewise.
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From Mike Frysinger <michael.frysinger@analog.com>
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* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
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for mismatched half registers in vector multipy-accumulate
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@ -39,9 +39,7 @@ Disassembly of section .text:
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3e: 14 00 RTE;
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00000040 <loop_lc0>:
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40: 82 e0 13 00 LSETUP\(44 <first_loop__BEGIN>,66 <first_loop__END>\)LC0;
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00000044 <first_loop__BEGIN>:
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40: 82 e0 13 00 LSETUP\(44 <loop_lc0\+0x4>,66 <loop_lc0\+0x26>\)LC0;
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44: 38 e4 7b fc R0=\[FP\+-3604\];
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48: 49 60 R1=0x9\(x\);
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4a: 38 e4 7b fc R0=\[FP\+-3604\];
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@ -55,27 +53,21 @@ Disassembly of section .text:
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5e: 10 93 \[P2\]=R0;
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60: 38 e4 7b fc R0=\[FP\+-3604\];
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64: 08 64 R0\+=0x1;
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00000066 <first_loop__END>:
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66: 38 e6 7b fc \[FP\+-3604\]=R0;
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6a: a2 e0 02 40 LSETUP\(6e <second_loop__BEGIN>,6e <second_loop__BEGIN>\)LC0=P4;
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0000006e <second_loop__BEGIN>:
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6a: a2 e0 02 40 LSETUP\(6e <loop_lc0\+0x2e>,6e <loop_lc0\+0x2e>\)LC0=P4;
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6e: 00 00 NOP;
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70: e0 e0 00 10 LSETUP\(70 <second_loop__BEGIN\+0x2>,70 <second_loop__BEGIN\+0x2>\)LC0=P1>>1;
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74: 82 e0 ff 03 LSETUP\(78 <second_loop__BEGIN\+0xa>,72 <second_loop__BEGIN\+0x4>\)LC0;
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78: af e0 00 52 LSETUP\(76 <second_loop__BEGIN\+0x8>,fffffc78 <another_loop__END\+0xfffffbba>\)LC0=P5;
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7c: ef e0 02 00 LSETUP\(7a <second_loop__BEGIN\+0xc>,80 <loop_lc1>\)LC0=P0>>1;
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70: e0 e0 00 10 LSETUP\(70 <loop_lc0\+0x30>,70 <loop_lc0\+0x30>\)LC0=P1>>1;
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74: 82 e0 ff 03 LSETUP\(78 <loop_lc0\+0x38>,72 <loop_lc0\+0x32>\)LC0;
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78: af e0 00 52 LSETUP\(76 <loop_lc0\+0x36>,fffffc78 <loop_lc1\+0xfffffbf8>\)LC0=P5;
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7c: ef e0 02 00 LSETUP\(7a <loop_lc0\+0x3a>,80 <loop_lc1>\)LC0=P0>>1;
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00000080 <loop_lc1>:
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80: 90 e0 00 00 LSETUP\(80 <loop_lc1>,80 <loop_lc1>\)LC1;
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84: b0 e0 00 40 LSETUP\(84 <loop_lc1\+0x4>,84 <loop_lc1\+0x4>\)LC1=P4;
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88: f8 e0 1b 10 LSETUP\(78 <second_loop__BEGIN\+0xa>,be <another_loop__END>\)LC1=P1>>1;
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88: f8 e0 1b 10 LSETUP\(78 <loop_lc0\+0x38>,be <loop_lc1\+0x3e>\)LC1=P1>>1;
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8c: 92 e0 ff 03 LSETUP\(90 <loop_lc1\+0x10>,8a <loop_lc1\+0xa>\)LC1;
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90: bf e0 00 52 LSETUP\(8e <loop_lc1\+0xe>,fffffc90 <another_loop__END\+0xfffffbd2>\)LC1=P5;
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94: ff e0 02 00 LSETUP\(92 <loop_lc1\+0x12>,98 <another_loop__BEGIN>\)LC1=P0>>1;
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00000098 <another_loop__BEGIN>:
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90: bf e0 00 52 LSETUP\(8e <loop_lc1\+0xe>,fffffc90 <loop_lc1\+0xfffffc10>\)LC1=P5;
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94: ff e0 02 00 LSETUP\(92 <loop_lc1\+0x12>,98 <loop_lc1\+0x18>\)LC1=P0>>1;
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98: 38 e4 7a fc R0=\[FP\+-3608\];
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9c: 00 32 P0=R0;
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9e: 42 44 P2=P0<<2;
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@ -91,6 +83,4 @@ Disassembly of section .text:
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b8: 00 32 P0=R0;
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ba: 82 5a P2=P2\+P0;
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bc: 10 91 R0=\[P2\];
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000000be <another_loop__END>:
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be: 08 93 \[P1\]=R0;
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@ -102,13 +102,9 @@ Disassembly of section .text:
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000000ce <bottom_of_FIR_filter>:
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ce: 81 e1 02 00 R1=2 <MY_LABEL1-0x28>\(Z\);
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d2: a2 e0 04 10 LSETUP\(d6 <bottom_of_FIR_filter\+0x8>,da <bottom_of_FIR_filter\+0xc>\)LC0=P1;
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d6: e2 e0 04 10 LSETUP\(da <bottom_of_FIR_filter\+0xc>,de <DoItSome__BEGIN>\)LC0=P1>>1;
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da: 82 e0 03 00 LSETUP\(de <DoItSome__BEGIN>,e0 <DoItSome__END>\)LC0;
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000000de <DoItSome__BEGIN>:
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d6: e2 e0 04 10 LSETUP\(da <bottom_of_FIR_filter\+0xc>,de <bottom_of_FIR_filter\+0x10>\)LC0=P1>>1;
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da: 82 e0 03 00 LSETUP\(de <bottom_of_FIR_filter\+0x10>,e0 <bottom_of_FIR_filter\+0x12>\)LC0;
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de: 08 60 R0=0x1\(x\);
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000000e0 <DoItSome__END>:
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e0: 11 60 R1=0x2\(x\);
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e2: 90 e0 00 00 LSETUP\(e2 <DoItSome__END\+0x2>,e2 <DoItSome__END\+0x2>\)LC1;
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e2: 90 e0 00 00 LSETUP\(e2 <bottom_of_FIR_filter\+0x14>,e2 <bottom_of_FIR_filter\+0x14>\)LC1;
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...
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