espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-21 10:34:21 +08:00
Code Issues Packages Projects Releases Wiki Activity

gas/:

Browse Source 
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
	generated for LOOP_BEGIN and LOOP_END instructions.
	(bfin_gen_loop): Likewise.

gas/testsuite/:
	* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
	and LOOP_END instruction are local now.
	* gas/bfin/flow2.d: Likewise.
This commit is contained in:
Bernd Schmidt
2008-03-26 16:33:33 +00:00
parent ee171c8f94
commit e2c038d34c
5 changed files with 30 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
gas/ChangeLog
View File

@ -20,6 +20,10 @@
data register in each rule that moves to the data data register in each rule that moves to the data
register. register.
* config/tc-bfin.c (bfin_start_line_hook): Localize the labels
generated for LOOP_BEGIN and LOOP_END instructions.
(bfin_gen_loop): Likewise.
2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com> 2008-03-19 Andreas Krebbel <krebbel1@de.ibm.com>
* config/tc-s390.c (md_parse_option): z10 option added. * config/tc-s390.c (md_parse_option): z10 option added.

15
gas/config/tc-bfin.c
View File

@ -866,15 +866,17 @@ bfin_start_line_hook ()
input_line_pointer = c; input_line_pointer = c;
if (maybe_end) if (maybe_end)
{ {
label_name = (char *) xmalloc ((c - c1) + strlen ("__END") + 1); label_name = (char *) xmalloc ((c - c1) + strlen ("__END") + 5);
label_name[0] = 0; label_name[0] = 0;
strcat (label_name, "L$L$");
strncat (label_name, c1, c-c1); strncat (label_name, c1, c-c1);
strcat (label_name, "__END"); strcat (label_name, "__END");
} }
else /* maybe_begin. */ else /* maybe_begin. */
{ {
label_name = (char *) xmalloc ((c - c1) + strlen ("__BEGIN") + 1); label_name = (char *) xmalloc ((c - c1) + strlen ("__BEGIN") + 5);
label_name[0] = 0; label_name[0] = 0;
strcat (label_name, "L$L$");
strncat (label_name, c1, c-c1); strncat (label_name, c1, c-c1);
strcat (label_name, "__BEGIN"); strcat (label_name, "__BEGIN");
} }
@ -884,8 +886,7 @@ bfin_start_line_hook ()
/* Loop_End follows the last instruction in the loop. /* Loop_End follows the last instruction in the loop.
Adjust label address. */ Adjust label address. */
if (maybe_end) if (maybe_end)
line_label->sy_value.X_add_number -= last_insn_size; ((struct local_symbol *) line_label)->lsy_value -= last_insn_size;
} }
/* Special extra functions that help bfin-parse.y perform its job. */ /* Special extra functions that help bfin-parse.y perform its job. */
@ -1878,15 +1879,17 @@ bfin_gen_loop (Expr_Node *expr, REG_T reg, int rop, REG_T preg)
Expr_Node *lbegin, *lend; Expr_Node *lbegin, *lend;
loopsym = expr->value.s_value; loopsym = expr->value.s_value;
lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 1); lbeginsym = (char *) xmalloc (strlen (loopsym) + strlen ("__BEGIN") + 5);
lendsym = (char *) xmalloc (strlen (loopsym) + strlen ("__END") + 1); lendsym = (char *) xmalloc (strlen (loopsym) + strlen ("__END") + 5);
lbeginsym[0] = 0; lbeginsym[0] = 0;
lendsym[0] = 0; lendsym[0] = 0;
strcat (lbeginsym, "L$L$");
strcat (lbeginsym, loopsym); strcat (lbeginsym, loopsym);
strcat (lbeginsym, "__BEGIN"); strcat (lbeginsym, "__BEGIN");
strcat (lendsym, "L$L$");
strcat (lendsym, loopsym); strcat (lendsym, loopsym);
strcat (lendsym, "__END"); strcat (lendsym, "__END");

4
gas/testsuite/ChangeLog
View File

@ -16,6 +16,10 @@
* gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check * gas/bfin/arithmetic.s, gas/bfin/arithmetic.d: Add check
for IU option. for IU option.
* gas/bfin/flow.d: Adjust since the generated labels for LOOP_BEGIN
and LOOP_END instruction are local now.
* gas/bfin/flow2.d: Likewise.
From Mike Frysinger <michael.frysinger@analog.com> From Mike Frysinger <michael.frysinger@analog.com>
* gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test * gas/bfin/expected_errors.s, gas/bfin/expected_errors.l: Add test
for mismatched half registers in vector multipy-accumulate for mismatched half registers in vector multipy-accumulate

28
gas/testsuite/gas/bfin/flow.d
View File

@ -39,9 +39,7 @@ Disassembly of section .text:
3e: 14 00 RTE; 3e: 14 00 RTE;
00000040 <loop_lc0>: 00000040 <loop_lc0>:
40: 82 e0 13 00 LSETUP\(44 <first_loop__BEGIN>,66 <first_loop__END>\)LC0; 40: 82 e0 13 00 LSETUP\(44 <loop_lc0\+0x4>,66 <loop_lc0\+0x26>\)LC0;
00000044 <first_loop__BEGIN>:
44: 38 e4 7b fc R0=\[FP\+-3604\]; 44: 38 e4 7b fc R0=\[FP\+-3604\];
48: 49 60 R1=0x9\(x\); 48: 49 60 R1=0x9\(x\);
4a: 38 e4 7b fc R0=\[FP\+-3604\]; 4a: 38 e4 7b fc R0=\[FP\+-3604\];
@ -55,27 +53,21 @@ Disassembly of section .text:
5e: 10 93 \[P2\]=R0; 5e: 10 93 \[P2\]=R0;
60: 38 e4 7b fc R0=\[FP\+-3604\]; 60: 38 e4 7b fc R0=\[FP\+-3604\];
64: 08 64 R0\+=0x1; 64: 08 64 R0\+=0x1;
00000066 <first_loop__END>:
66: 38 e6 7b fc \[FP\+-3604\]=R0; 66: 38 e6 7b fc \[FP\+-3604\]=R0;
6a: a2 e0 02 40 LSETUP\(6e <second_loop__BEGIN>,6e <second_loop__BEGIN>\)LC0=P4; 6a: a2 e0 02 40 LSETUP\(6e <loop_lc0\+0x2e>,6e <loop_lc0\+0x2e>\)LC0=P4;
0000006e <second_loop__BEGIN>:
6e: 00 00 NOP; 6e: 00 00 NOP;
70: e0 e0 00 10 LSETUP\(70 <second_loop__BEGIN\+0x2>,70 <second_loop__BEGIN\+0x2>\)LC0=P1>>1; 70: e0 e0 00 10 LSETUP\(70 <loop_lc0\+0x30>,70 <loop_lc0\+0x30>\)LC0=P1>>1;
74: 82 e0 ff 03 LSETUP\(78 <second_loop__BEGIN\+0xa>,72 <second_loop__BEGIN\+0x4>\)LC0; 74: 82 e0 ff 03 LSETUP\(78 <loop_lc0\+0x38>,72 <loop_lc0\+0x32>\)LC0;
78: af e0 00 52 LSETUP\(76 <second_loop__BEGIN\+0x8>,fffffc78 <another_loop__END\+0xfffffbba>\)LC0=P5; 78: af e0 00 52 LSETUP\(76 <loop_lc0\+0x36>,fffffc78 <loop_lc1\+0xfffffbf8>\)LC0=P5;
7c: ef e0 02 00 LSETUP\(7a <second_loop__BEGIN\+0xc>,80 <loop_lc1>\)LC0=P0>>1; 7c: ef e0 02 00 LSETUP\(7a <loop_lc0\+0x3a>,80 <loop_lc1>\)LC0=P0>>1;
00000080 <loop_lc1>: 00000080 <loop_lc1>:
80: 90 e0 00 00 LSETUP\(80 <loop_lc1>,80 <loop_lc1>\)LC1; 80: 90 e0 00 00 LSETUP\(80 <loop_lc1>,80 <loop_lc1>\)LC1;
84: b0 e0 00 40 LSETUP\(84 <loop_lc1\+0x4>,84 <loop_lc1\+0x4>\)LC1=P4; 84: b0 e0 00 40 LSETUP\(84 <loop_lc1\+0x4>,84 <loop_lc1\+0x4>\)LC1=P4;
88: f8 e0 1b 10 LSETUP\(78 <second_loop__BEGIN\+0xa>,be <another_loop__END>\)LC1=P1>>1; 88: f8 e0 1b 10 LSETUP\(78 <loop_lc0\+0x38>,be <loop_lc1\+0x3e>\)LC1=P1>>1;
8c: 92 e0 ff 03 LSETUP\(90 <loop_lc1\+0x10>,8a <loop_lc1\+0xa>\)LC1; 8c: 92 e0 ff 03 LSETUP\(90 <loop_lc1\+0x10>,8a <loop_lc1\+0xa>\)LC1;
90: bf e0 00 52 LSETUP\(8e <loop_lc1\+0xe>,fffffc90 <another_loop__END\+0xfffffbd2>\)LC1=P5; 90: bf e0 00 52 LSETUP\(8e <loop_lc1\+0xe>,fffffc90 <loop_lc1\+0xfffffc10>\)LC1=P5;
94: ff e0 02 00 LSETUP\(92 <loop_lc1\+0x12>,98 <another_loop__BEGIN>\)LC1=P0>>1; 94: ff e0 02 00 LSETUP\(92 <loop_lc1\+0x12>,98 <loop_lc1\+0x18>\)LC1=P0>>1;
00000098 <another_loop__BEGIN>:
98: 38 e4 7a fc R0=\[FP\+-3608\]; 98: 38 e4 7a fc R0=\[FP\+-3608\];
9c: 00 32 P0=R0; 9c: 00 32 P0=R0;
9e: 42 44 P2=P0<<2; 9e: 42 44 P2=P0<<2;
@ -91,6 +83,4 @@ Disassembly of section .text:
b8: 00 32 P0=R0; b8: 00 32 P0=R0;
ba: 82 5a P2=P2\+P0; ba: 82 5a P2=P2\+P0;
bc: 10 91 R0=\[P2\]; bc: 10 91 R0=\[P2\];
000000be <another_loop__END>:
be: 08 93 \[P1\]=R0; be: 08 93 \[P1\]=R0;

10
gas/testsuite/gas/bfin/flow2.d
View File

@ -102,13 +102,9 @@ Disassembly of section .text:
000000ce <bottom_of_FIR_filter>: 000000ce <bottom_of_FIR_filter>:
ce: 81 e1 02 00 R1=2 <MY_LABEL1-0x28>\(Z\); ce: 81 e1 02 00 R1=2 <MY_LABEL1-0x28>\(Z\);
d2: a2 e0 04 10 LSETUP\(d6 <bottom_of_FIR_filter\+0x8>,da <bottom_of_FIR_filter\+0xc>\)LC0=P1; d2: a2 e0 04 10 LSETUP\(d6 <bottom_of_FIR_filter\+0x8>,da <bottom_of_FIR_filter\+0xc>\)LC0=P1;
d6: e2 e0 04 10 LSETUP\(da <bottom_of_FIR_filter\+0xc>,de <DoItSome__BEGIN>\)LC0=P1>>1; d6: e2 e0 04 10 LSETUP\(da <bottom_of_FIR_filter\+0xc>,de <bottom_of_FIR_filter\+0x10>\)LC0=P1>>1;
da: 82 e0 03 00 LSETUP\(de <DoItSome__BEGIN>,e0 <DoItSome__END>\)LC0; da: 82 e0 03 00 LSETUP\(de <bottom_of_FIR_filter\+0x10>,e0 <bottom_of_FIR_filter\+0x12>\)LC0;
000000de <DoItSome__BEGIN>:
de: 08 60 R0=0x1\(x\); de: 08 60 R0=0x1\(x\);
000000e0 <DoItSome__END>:
e0: 11 60 R1=0x2\(x\); e0: 11 60 R1=0x2\(x\);
e2: 90 e0 00 00 LSETUP\(e2 <DoItSome__END\+0x2>,e2 <DoItSome__END\+0x2>\)LC1; e2: 90 e0 00 00 LSETUP\(e2 <bottom_of_FIR_filter\+0x14>,e2 <bottom_of_FIR_filter\+0x14>\)LC1;
... ...