[ gas/ChangeLog ]

* config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
	(mips_opts): Likewise.
	(file_ase_smartmips): New variable.
	(ISA_HAS_ROR): SmartMIPS implements rotate instructions.
	(macro_build): Handle SmartMIPS instructions.
	(mips_ip): Likewise.
	(md_longopts): Add argument handling for smartmips.
	(md_parse_options, mips_after_parse_args): Likewise.
	(s_mipsset): Add .set smartmips support.
	(md_show_usage): Document -msmartmips/-mno-smartmips.
	* doc/as.texinfo: Document -msmartmips/-mno-smartmips and
	.set smartmips.
	* doc/c-mips.texi: Likewise.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test.
	* gas/mips/mips.exp: Run smartmips test.
This commit is contained in:
Thiemo Seufer
2006-05-08 15:57:05 +00:00
parent 336e5de1c9
commit e16bfa71a1
8 changed files with 145 additions and 4 deletions

@ -1,3 +1,21 @@
2006-05-08 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* config/tc-mips.c (mips_set_options): Add ase_smartmips flag.
(mips_opts): Likewise.
(file_ase_smartmips): New variable.
(ISA_HAS_ROR): SmartMIPS implements rotate instructions.
(macro_build): Handle SmartMIPS instructions.
(mips_ip): Likewise.
(md_longopts): Add argument handling for smartmips.
(md_parse_options, mips_after_parse_args): Likewise.
(s_mipsset): Add .set smartmips support.
(md_show_usage): Document -msmartmips/-mno-smartmips.
* doc/as.texinfo: Document -msmartmips/-mno-smartmips and
.set smartmips.
* doc/c-mips.texi: Likewise.
2006-05-08 Alan Modra <amodra@bigpond.net.au> 2006-05-08 Alan Modra <amodra@bigpond.net.au>
* write.c (relax_segment): Add pass count arg. Don't error on * write.c (relax_segment): Add pass count arg. Don't error on

@ -193,6 +193,7 @@ struct mips_set_options
command line options, and based on the default architecture. */ command line options, and based on the default architecture. */
int ase_mips3d; int ase_mips3d;
int ase_mdmx; int ase_mdmx;
int ase_smartmips;
int ase_dsp; int ase_dsp;
int ase_mt; int ase_mt;
/* Whether we are assembling for the mips16 processor. 0 if we are /* Whether we are assembling for the mips16 processor. 0 if we are
@ -245,7 +246,7 @@ static int file_mips_fp32 = -1;
static struct mips_set_options mips_opts = static struct mips_set_options mips_opts =
{ {
ISA_UNKNOWN, -1, -1, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0, CPU_UNKNOWN, FALSE ISA_UNKNOWN, -1, -1, 0, -1, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0, CPU_UNKNOWN, FALSE
}; };
/* These variables are filled in with the masks of registers used. /* These variables are filled in with the masks of registers used.
@ -269,6 +270,13 @@ static int file_ase_mips3d;
command line (e.g., by -march). */ command line (e.g., by -march). */
static int file_ase_mdmx; static int file_ase_mdmx;
/* True if -msmartmips was passed or implied by arguments passed on the
command line (e.g., by -march). */
static int file_ase_smartmips;
#define ISA_SUPPORT_SMARTMIPS (mips_opts.isa == ISA_MIPS32 \
|| mips_opts.isa == ISA_MIPS32R2)
/* True if -mdsp was passed or implied by arguments passed on the /* True if -mdsp was passed or implied by arguments passed on the
command line (e.g., by -march). */ command line (e.g., by -march). */
static int file_ase_dsp; static int file_ase_dsp;
@ -318,6 +326,7 @@ static int mips_32bitmode = 0;
#define ISA_HAS_ROR(ISA) ( \ #define ISA_HAS_ROR(ISA) ( \
(ISA) == ISA_MIPS32R2 \ (ISA) == ISA_MIPS32R2 \
|| (ISA) == ISA_MIPS64R2 \ || (ISA) == ISA_MIPS64R2 \
|| mips_opts.ase_smartmips \
) )
#define HAVE_32BIT_GPRS \ #define HAVE_32BIT_GPRS \
@ -3012,7 +3021,8 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
|| mo->pinfo == INSN_MACRO || mo->pinfo == INSN_MACRO
|| !OPCODE_IS_MEMBER (mo, || !OPCODE_IS_MEMBER (mo,
(mips_opts.isa (mips_opts.isa
| (file_ase_mips16 ? INSN_MIPS16 : 0)), | (file_ase_mips16 ? INSN_MIPS16 : 0)
| (mips_opts.ase_smartmips ? INSN_SMARTMIPS : 0)),
mips_opts.arch) mips_opts.arch)
|| (mips_opts.arch == CPU_R4650 && (mo->pinfo & FP_D) != 0)) || (mips_opts.arch == CPU_R4650 && (mo->pinfo & FP_D) != 0))
{ {
@ -8032,7 +8042,8 @@ mips_ip (char *str, struct mips_cl_insn *ip)
| (mips_opts.ase_mdmx ? INSN_MDMX : 0) | (mips_opts.ase_mdmx ? INSN_MDMX : 0)
| (mips_opts.ase_dsp ? INSN_DSP : 0) | (mips_opts.ase_dsp ? INSN_DSP : 0)
| (mips_opts.ase_mt ? INSN_MT : 0) | (mips_opts.ase_mt ? INSN_MT : 0)
| (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)), | (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)
| (mips_opts.ase_smartmips ? INSN_SMARTMIPS : 0)),
mips_opts.arch)) mips_opts.arch))
ok = TRUE; ok = TRUE;
else else
@ -10620,9 +10631,13 @@ struct option md_longopts[] =
{"mmt", no_argument, NULL, OPTION_MT}, {"mmt", no_argument, NULL, OPTION_MT},
#define OPTION_NO_MT (OPTION_ASE_BASE + 9) #define OPTION_NO_MT (OPTION_ASE_BASE + 9)
{"mno-mt", no_argument, NULL, OPTION_NO_MT}, {"mno-mt", no_argument, NULL, OPTION_NO_MT},
#define OPTION_SMARTMIPS (OPTION_ASE_BASE + 10)
{"msmartmips", no_argument, NULL, OPTION_SMARTMIPS},
#define OPTION_NO_SMARTMIPS (OPTION_ASE_BASE + 11)
{"mno-smartmips", no_argument, NULL, OPTION_NO_SMARTMIPS},
/* Old-style architecture options. Don't add more of these. */ /* Old-style architecture options. Don't add more of these. */
#define OPTION_COMPAT_ARCH_BASE (OPTION_ASE_BASE + 10) #define OPTION_COMPAT_ARCH_BASE (OPTION_ASE_BASE + 12)
#define OPTION_M4650 (OPTION_COMPAT_ARCH_BASE + 0) #define OPTION_M4650 (OPTION_COMPAT_ARCH_BASE + 0)
{"m4650", no_argument, NULL, OPTION_M4650}, {"m4650", no_argument, NULL, OPTION_M4650},
#define OPTION_NO_M4650 (OPTION_COMPAT_ARCH_BASE + 1) #define OPTION_NO_M4650 (OPTION_COMPAT_ARCH_BASE + 1)
@ -10910,6 +10925,14 @@ md_parse_option (int c, char *arg)
mips_opts.ase_mips3d = 0; mips_opts.ase_mips3d = 0;
break; break;
case OPTION_SMARTMIPS:
mips_opts.ase_smartmips = 1;
break;
case OPTION_NO_SMARTMIPS:
mips_opts.ase_smartmips = 0;
break;
case OPTION_FIX_VR4120: case OPTION_FIX_VR4120:
mips_fix_vr4120 = 1; mips_fix_vr4120 = 1;
break; break;
@ -11248,6 +11271,7 @@ mips_after_parse_args (void)
file_ase_mips16 = mips_opts.mips16; file_ase_mips16 = mips_opts.mips16;
file_ase_mips3d = mips_opts.ase_mips3d; file_ase_mips3d = mips_opts.ase_mips3d;
file_ase_mdmx = mips_opts.ase_mdmx; file_ase_mdmx = mips_opts.ase_mdmx;
file_ase_smartmips = mips_opts.ase_smartmips;
file_ase_dsp = mips_opts.ase_dsp; file_ase_dsp = mips_opts.ase_dsp;
file_ase_mt = mips_opts.ase_mt; file_ase_mt = mips_opts.ase_mt;
mips_opts.gp32 = file_mips_gp32; mips_opts.gp32 = file_mips_gp32;
@ -12101,6 +12125,15 @@ s_mipsset (int x ATTRIBUTE_UNUSED)
else if (strcmp (name, "nomips16") == 0 else if (strcmp (name, "nomips16") == 0
|| strcmp (name, "noMIPS-16") == 0) || strcmp (name, "noMIPS-16") == 0)
mips_opts.mips16 = 0; mips_opts.mips16 = 0;
else if (strcmp (name, "smartmips") == 0)
{
if (!ISA_SUPPORT_SMARTMIPS)
as_warn ("%s ISA does not support SmartMIPS ASE",
mips_cpu_info_from_isa (mips_opts.isa)->name);
mips_opts.ase_smartmips = 1;
}
else if (strcmp (name, "nosmartmips") == 0)
mips_opts.ase_smartmips = 0;
else if (strcmp (name, "mips3d") == 0) else if (strcmp (name, "mips3d") == 0)
mips_opts.ase_mips3d = 1; mips_opts.ase_mips3d = 1;
else if (strcmp (name, "nomips3d") == 0) else if (strcmp (name, "nomips3d") == 0)
@ -14570,6 +14603,9 @@ MIPS options:\n\
-mips16 generate mips16 instructions\n\ -mips16 generate mips16 instructions\n\
-no-mips16 do not generate mips16 instructions\n")); -no-mips16 do not generate mips16 instructions\n"));
fprintf (stream, _("\ fprintf (stream, _("\
-msmartmips generate smartmips instructions\n\
-mno-smartmips do not generate smartmips instructions\n"));
fprintf (stream, _("\
-mdsp generate DSP instructions\n\ -mdsp generate DSP instructions\n\
-mno-dsp do not generate DSP instructions\n")); -mno-dsp do not generate DSP instructions\n"));
fprintf (stream, _("\ fprintf (stream, _("\

@ -367,6 +367,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
[@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}] [@b{-trap}] [@b{-no-break}] [@b{-break}] [@b{-no-trap}]
[@b{-mfix7000}] [@b{-mno-fix7000}] [@b{-mfix7000}] [@b{-mno-fix7000}]
[@b{-mips16}] [@b{-no-mips16}] [@b{-mips16}] [@b{-no-mips16}]
[@b{-msmartmips}] [@b{-mno-smartmips}]
[@b{-mips3d}] [@b{-no-mips3d}] [@b{-mips3d}] [@b{-no-mips3d}]
[@b{-mdmx}] [@b{-no-mdmx}] [@b{-mdmx}] [@b{-no-mdmx}]
[@b{-mdsp}] [@b{-mno-dsp}] [@b{-mdsp}] [@b{-mno-dsp}]
@ -1006,6 +1007,12 @@ Generate code for the MIPS 16 processor. This is equivalent to putting
@code{.set mips16} at the start of the assembly file. @samp{-no-mips16} @code{.set mips16} at the start of the assembly file. @samp{-no-mips16}
turns off this option. turns off this option.
@item -msmartmips
@itemx -mno-smartmips
Enables the SmartMIPS extension to the MIPS32 instruction set. This is
equivalent to putting @code{.set smartmips} at the start of the assembly file.
@samp{-mno-smartmips} turns off this option.
@item -mips3d @item -mips3d
@itemx -no-mips3d @itemx -no-mips3d
Generate code for the MIPS-3D Application Specific Extension. Generate code for the MIPS-3D Application Specific Extension.

@ -106,6 +106,14 @@ Generate code for the MIPS 16 processor. This is equivalent to putting
@samp{.set mips16} at the start of the assembly file. @samp{-no-mips16} @samp{.set mips16} at the start of the assembly file. @samp{-no-mips16}
turns off this option. turns off this option.
@item -msmartmips
@itemx -mno-smartmips
Enables the SmartMIPS extensions to the MIPS32 instruction set, which
provides a number of new instructions which target smartcard and
cryptographic applications. This is equivalent to putting
@samp{.set smartmips} at the start of the assembly file.
@samp{-mno-smartmips} turns off this option.
@item -mips3d @item -mips3d
@itemx -no-mips3d @itemx -no-mips3d
Generate code for the MIPS-3D Application Specific Extension. Generate code for the MIPS-3D Application Specific Extension.
@ -399,6 +407,10 @@ The directive @samp{.set mips16} puts the assembler into MIPS 16 mode,
in which it will assemble instructions for the MIPS 16 processor. Use in which it will assemble instructions for the MIPS 16 processor. Use
@samp{.set nomips16} to return to normal 32 bit mode. @samp{.set nomips16} to return to normal 32 bit mode.
The @samp{.set smartmips} directive enables use of the SmartMIPS
extensions to the MIPS32 @sc{isa}; the @samp{.set nosmartmips} directive
reverses that.
Traditional @sc{mips} assemblers do not support this directive. Traditional @sc{mips} assemblers do not support this directive.
@node MIPS autoextend @node MIPS autoextend

@ -1,3 +1,10 @@
2006-05-08 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test.
* gas/mips/mips.exp: Run smartmips test.
2006-05-05 Julian Brown <julian@codesourcery.com> 2006-05-05 Julian Brown <julian@codesourcery.com>
* gas/arm/vfp-neon-overlap.s: New test. Overlapping VFP/Neon * gas/arm/vfp-neon-overlap.s: New test. Overlapping VFP/Neon

@ -766,6 +766,7 @@ if { [istarget mips*-*-vxworks*] } {
run_list_test "noat-6" "" run_list_test "noat-6" ""
run_list_test "noat-7" "" run_list_test "noat-7" ""
run_dump_test_arches "smartmips" [mips_arch_list_matching mips32 !gpr64]
run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32r2] run_dump_test_arches "mips32-dsp" [mips_arch_list_matching mips32r2]
run_dump_test_arches "mips32-mt" [mips_arch_list_matching mips32r2 !gpr64] run_dump_test_arches "mips32-mt" [mips_arch_list_matching mips32r2 !gpr64]

@ -0,0 +1,29 @@
#objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric
#name: SmartMIPS
#as: -msmartmips
.*: +file format .*mips.*
Disassembly of section \.text:
0+0000 <[^>]*> 00c52046 rorv \$4,\$5,\$6
0+0004 <[^>]*> 00c52046 rorv \$4,\$5,\$6
0+0008 <[^>]*> 00c52046 rorv \$4,\$5,\$6
0+000c <[^>]*> 00c52046 rorv \$4,\$5,\$6
0+0010 <[^>]*> 002527c2 ror \$4,\$5,0x1f
0+0014 <[^>]*> 00252202 ror \$4,\$5,0x8
0+0018 <[^>]*> 00252042 ror \$4,\$5,0x1
0+001c <[^>]*> 00252002 ror \$4,\$5,0x0
0+0020 <[^>]*> 002527c2 ror \$4,\$5,0x1f
0+0024 <[^>]*> 00252042 ror \$4,\$5,0x1
0+0028 <[^>]*> 00252602 ror \$4,\$5,0x18
0+002c <[^>]*> 002527c2 ror \$4,\$5,0x1f
0+0030 <[^>]*> 00252002 ror \$4,\$5,0x0
0+0034 <[^>]*> 70a41088 lwxs \$2,\$4\(\$5\)
0+0038 <[^>]*> 72110441 maddp \$16,\$17
0+003c <[^>]*> 016c0459 multp \$11,\$12
0+0040 <[^>]*> 00004052 mflhxu \$8
0+0044 <[^>]*> 00800053 mtlhx \$4
0+0048 <[^>]*> 70d80481 pperm \$6,\$24
0+004c <[^>]*> 00000000 nop

@ -0,0 +1,31 @@
# Source file used to test SmartMIPS instruction set
.text
stuff:
ror $4,$5,$6
rorv $4,$5,$6
rotr $4,$5,$6
rotrv $4,$5,$6
ror $4,$5,31
ror $4,$5,8
ror $4,$5,1
ror $4,$5,0
rotr $4,$5,31
rol $4,$5,31
rol $4,$5,8
rol $4,$5,1
rol $4,$5,0
lwxs $2,$4($5)
maddp $16,$17
multp $11,$12
mflhxu $8
mtlhx $4
pperm $6,$24
.p2align 4